LX1672-03CLQ-TR MICROSEMI [Microsemi Corporation], LX1672-03CLQ-TR Datasheet - Page 14
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LX1672-03CLQ-TR
Manufacturer Part Number
LX1672-03CLQ-TR
Description
Multiple Output LoadSHARE PWM TM
Manufacturer
MICROSEMI [Microsemi Corporation]
Datasheet
1.LX1672-03CLQ-TR.pdf
(20 pages)
Copyright © 2000
Rev. 1.0, 2005-08-10
(Rb) offsetting the phase 2 error amplifier to create an imbalance
in the L1 and L2 currents. Although there are many ways to
calculate component values the approach taken here is to pick Ra,
Rb, R
resistor Rf can then be calculated.
follow the previous examples to understand the basics of
LoadSHARE™. The most common reason to imbalance the
current in the two phases is because of limitations on the
available power from the input rails for each phase. Use the
available input power and total
determine the inductor currents for each phase.
is typically 1MΩ)
amplifier
actual current ratio by allowing some of the switching waveforms
to couple into the current summing path. It may be necessary to
make some adjustment in Rf after the final layout is evaluated.
Also, the equation for Rf requires very accurate numbers for the
voltages to insure an accurate result.
The circuit in Figure 9 sums a current through a 1MΩ resistor
The first decision to be made is the current sharing ratio,
All references are to Figure 9
1)
2)
3) Calculate the offset voltage Vos at the output of the offset
4) Calculate the value for Rf
(select a value for R
Due to the high impedances in this circuit layout can affect the
IN
, V
Calculate the voltages V1 and V2.
Select values for Ra and Rb (Ra is typically 62KΩ ; Rb
TM
OUT
, and inductor ESR. A value for the remaining
Vos
V
V
2
1
=
=
=
Rf
V
L
IN
L
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
2
=
1
2
typically 5KΩ)
−
Current
Current
R
⎛
⎜
⎝
IN
V
⎛
⎜ ⎜
⎝
2
Vos
Ra
V
×
−
×
OUT
required
L
V
L
T H E O R Y O F O P E R A T I O N
−
1
1
2
ESR
V
⎞
⎟
⎠
ESR
−
OUT
×
V1
(
+
Ra
+
⎞
⎟ ⎟
⎠
Vout
output power
Vout
+
Rb
)
Integrated Products Division
®
Microsemi
to
between the two phases is to add a resistor in series with one of the
inductors. This will reduce the current in the inductor that has the
resistor and increase the current in the inductor of the opposite
phase. The example of Figure 7 can be used to determine the
current ratio by adding the value of the series resistor to the ESR
value of the inductor. The added resistance will lower the overall
efficiency
timing errors, R
half bridge drivers are removed from the current sharing accuracy.
The errors in the current sharing accuracy are derived from the
tolerance on the inductor’s ESR and the input offset voltage
specification of the error amplifier. The equivalent circuit is shown
next for an absolute worst case difference of phase currents
between the two inductors.
B
A fourth but less desirable way to produce the ratio current
LoadSHARE ERROR SOURCES
Nominal ESR of 6mΩ. ESR ±5%
Max offset Error = 6mV
+5% ESR L1 = 6.3 mΩ
-5% ESR L2 = 5.7 mΩ
Phase 2 current is 2.32A greater than Phase 1.
Input bias current also contributes to imbalance.
Multiple Output LoadSHARE™ PWM
With the high DC feedback gain of this second loop, all phase
If
V
V
Phase
I
-P
1
2
phase
−
=
HASE
Offset
V
Error
( C O N T I N U E D )
5mV
V
2
OUT
1
current
1
, L
+
current
=
6
P
DS(On)
OAD
mV
12
RODUCTION
+
-
=
V2
V1
×
SHARE™ (S
=
=
V
6.3
ESR
Figure 6 – Error Amplitude
mismatch, and voltage differences across the
12
1 8
- 2
×
.6
A
Phase 2
ESR L2
V
10
L
mV
=
OUT
2
−
V
3
ESRL
- 1
=
=
D
Phase 1
ESR L1
1 8
75.6
ATA
ERIES
V
5.7
OUT
.6
1
x
x
mV
10
10
S
R
−
HEET
−
ESISTOR
3
3
=
14.
32
M
VOUT
A
ETHOD
LX1672
)
Page 14