A6811SA ALLEGRO [Allegro MicroSystems], A6811SA Datasheet - Page 5

• Manufacturer Part Number: A6811SA
• Description: DABiC-IV, 32-BIT SERIAL-INPUT, LATCHED SOURCE DRIVER
• Manufacturer: ALLEGRO [Allegro MicroSystems]

A. Data Active Time Before Clock Pulse
B. Data Active Time After Clock Pulse
C. Clock Pulse Width, t
D. Time Between Clock Activation and Strobe, t
E. Strobe Pulse Width, t
NOTE – Timing is representative of a 10 MHz clock. Signifi-
cantly higher speeds are attainable.
(Data Set-Up Time), t
(Data Hold Time), t
w(CH)
w(STH)
h(D)
su(D)
............................................... 25 ns
............................................... 50 ns
BLANKING
............................................. 50 ns
BLANKING
DATA OUT
STROBE
DATA IN
......................................... 25 ns
CLOCK
SERIAL
SERIAL
OUT
OUT
N
N
A
DATA
(Logic Levels are V
su(C)
50%
B
....... 100 ns
C
50%
LOW = ALL OUTPUTS ENABLED
50%
D
50%
t
p(CH-SQX)
t
en(BQ)
50%
HIGH = ALL OUTPUTS BLANKED (DISABLED)
DD
and Ground)
E
t
p(STH-QL)
10%
t
p(STH-QH)
t
dis(BQ)
DATA
90%
LATCHED SOURCE DRIVER
t
DATA
r
10%
32-BIT SERIAL-INPUT,
90%
50%
Dwg. WP-030A
Dwg. WP-029
t
DATA
f
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