LM92_05 NSC [National Semiconductor], LM92_05 Datasheet - Page 11

• Manufacturer Part Number: LM92_05
• Manufacturer: NSC [National Semiconductor]

1.0 Functional Description
1.9 POINTER REGISTER
(Selects which registers will be read from or written to):
P0–P2: Register Select:
P3–P7: Must be kept zero.
1.10 TEMPERATURE REGISTER
D0–D2: Status Bits
D3–D15: Temperature Data. One LSB = 0.0625˚C. Two’s complement format.
1.11 CONFIGURATION REGISTER
D0: Shutdown - When set to 1 the LM92 goes to low power shutdown mode. Power up default of “0”.
D1: Interrupt mode - 0 is Comparator Interrupt mode, 1 is Event Interrupt mode. Power up default of “0”.
D2, D3: T_CRIT_A and INT Polarity - 0 is active low, 1 is active high. Outputs are open-drain. Power up default of “0”
D4: Fault Queue - When set to 1 the Fault Queu is enabled, see Section 1.7. Power up default of “0”.
D5–D7: These bits are used for production testing and must be kept zero for normal operation.
1.12 T
D0–D2: Undefined
(Read Only):
(Read/Write):
(Read/Write):
Sign
Sign
D15
D15
HYST
D7
0
MSB
MSB
D14
D14
, T
LOW
Bit 10
Bit 10
D13
D13
, T
HIGH
FIGURE 4. Inadvertent 8-Bit Read from 16-Bit Register where D7 is Zero (“0”)
D6
0
Bit 9
Bit 9
AND T_CRIT_A REGISTERS
D12
D12
1
P2
Bit 8
Bit 8
0
0
0
0
1
1
D11
D11
P7
0
1
D5
0
P1
0
0
1
1
0
0
Bit 7
D10
D10
Bit7
P6
0
1
P0
(Continued)
0
1
0
1
0
1
Fault Queue
Bit 6
Bit6
P5
D9
D9
0
Temperature (Read only) (Power-up
default)
Configuration (Read/Write)
T
T_CRIT (Read/Write)
T
T
Manufacturer’s ID
HYST
LOW
HIGH
D4
Bit 5
(Read/Write)
Bit5
P4
(Read/Write)
D8
D8
(Read/Write)
0
11
INT Polarity
Bit 4
Bit 4
P3
0
D7
D7
Register
D3
P2
Bit 3
Bit 3
D6
D6
Register Select
P1
T_CRIT_A
Bit 2
Bit 2
D5
D5
Polarity
D2
P0
Bit 1
Bit 1
D4
D4
INT Mode
Bit 0
Bit 0
D3
D3
D1
CRIT
10105108
D2
D2
X
Status Bits
Shutdown
HIGH
D1
D1
X
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D0
LOW
D0
D0
X