STTS752E STMICROELECTRONICS [STMicroelectronics], STTS752E Datasheet - Page 22
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STTS752E
Manufacturer Part Number
STTS752E
Description
Digital temperature sensor and thermal watchdog
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.STTS752E.pdf
(38 pages)
- Current page: 22 of 38
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3.4.5
22/38
Acknowledge
Each byte of eight bits is followed by one Acknowledge Bit. This Acknowledge Bit is a low
level put on the bus by the receiver whereas the master generates an extra acknowledge
related clock pulse (see
obliged to generate an acknowledge after the reception of each byte that has been clocked
out of the slave transmitter.
The device that acknowledges has to pull down the SDA line during the acknowledge clock
pulse in such a way that the SDA line is a stable Low during the High period of the
acknowledge related clock pulse. Of course, setup and hold times must be taken into
account. A master receiver must signal an end of data to the slave transmitter by not
generating an acknowledge on the last byte that has been clocked out of the slave. In this
case the transmitter must leave the data line High to enable the master to generate the
STOP condition.
Figure 7.
SCL FROM
MASTER
DATA OUTPUT
BY TRANSMITTER
DATA OUTPUT
BY RECEIVER
Acknowledgement sequence
START
Figure 7 on page
MSB
1
22). A slave receiver which is addressed is
2
LSB
8
ACKNOWLEDGEMENT
CLOCK PULSE FOR
9
AI00601
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