LNBEH21PD STMICROELECTRONICS [STMicroelectronics], LNBEH21PD Datasheet - Page 8

• Manufacturer Part Number: LNBEH21PD
• Description: LNB SUPPLY AND CONTROL IC WITH STEP-UP CONVERTER AND IC INTERFACE
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

LNBEH21
RECEIVED DATA (I
The LNBEH21 can provide to the Master a copy of the SYSTEM REGISTER information via I
read mode. The read mode is Master activated by sending the chip address with R/W bit set to 1. At the
following master generated clocks bits, the LNBEH21 issues a byte on the SDA data bus line (MSB
transmitted first).
At the ninth clock bit the MCU master can:
- acknowledge the reception, starting in this way the transmission of another byte from the LNBEH21;
- no acknowledge, stopping the read mode communication.
While the whole register is read back by the µP, only the two read-only bits OLF and OTF convey
diagnostic informations about the LNBEH21
Values are typical unless otherwise specified
POWER-ON I
The I
the UnderVoltage Lockout threshold (6.7V typ.), the interface will not respond to any I
the System Register (SR) is initialized to all zeroes, thus keeping the power blocks disabled. Once the
V
µP. This is due to 500mV of hysteresis provided in the UVL threshold to avoid false retriggering of the
Power-On reset circuit.
ADDRESS PIN
Connecting this pin to GND the Chip I
4 different addresses simply setting this pin at 4 fixed voltage levels (see table on page 11).
COMMUNICATION MODE SELECTION
I
The LNBEH21 can work either in DiSEqC
communication mode is achieved through the dedicated I
or to HIGH. Depending on the communication mode selection (OM bit state) the I
VSEL pin (#14) operation are switched between two different functions:
VOM bit and TEN/VSEL pin functions with OM=0 (DiSEqC
- The TEN/VSEL pin controls the 22KHz bursting code, by enabling the internal 22KHz tone generator, to
allow immediate DiSEqC
- In DiSEqC
and the DC/DC converter output voltage (V
to 13.25V or 19.5V respectively if VOM=0 or VOM=1 (14.25V or 20.5V if LLC=1) and V
V
8/22
2
PCL
CC
OUT
C OM bit (Operating Mode selection bit)
These bits are read exactly the same as
they were left after last write operation
rises above 7.3V typ, the I
2
+2.2V typ., according to DiSEqC section in the Truth Table on page 11;
C interface built in the LNBEH21 is automatically reset at power-on. As long as the V
TTX
TM
2
OM
C INTERFACE RESET
mode, the VOM I
2
LLC
C bus READ MODE)
TM
VOM
data encoding.
2
C interface becomes operative and the SR can be configured by the main
2
EN
C bit controls simultaneously the post-regulator output voltage (V
2
C interface address is 0001000, but, it is possible to choice among
OTF
0
1
TM
UP
mode or in 13/18V Control Word mode; the selection of the
). The VOM bit function is to select the LNB output voltage
OLF
0
1
T
T
I
I
OUT
OUT
J
J
<135°C, normal operation
>150°C, power block disabled
<I
>I
2
OMAX
OMAX
C OM bit that must be respectively set to LOW
TM
, normal operation
, overload protection triggered
mode).
Function
2
C VOM bit and the TEN/
2
C command and
CC
UP
stays below
2
C bus in
is set to
OUT
)