IR3897 IRF [International Rectifier], IR3897 Datasheet - Page 4

• Manufacturer Part Number: IR3897
• Description: 4A HIGHLY INTEGRATED SUPLRBUCK
• Manufacturer: IRF [International Rectifier]

PIN DESCRIPTIONS
PIN #
10
11
12
13
14
15
16
17
4
1
2
3
4
5
6
7
8
9
AUGUST 08, 2012 |DATA SHEET | Rev 3.3
PIN NAME
Vcc/LDO_Out
Rt/Sync
PGood
Enable
Comp
S_Ctrl
PGnd
Vsns
PVin
Boot
Vref
Gnd
Gnd
Vin
SW
Vp
Fb
Single‐Input Voltage, Synchronous Buck Regulator
Inverting input to the error amplifier. This pin is connected directly to the output
of the regulator via resistor divider to set the output voltage and provide
feedback to the error amplifier.
Internal reference voltage , it can be used for margining operation also. In
normal and sequencing mode operation, Vref is left floating. A 1nF ceramic
capacitor is recommended between this pin and Gnd. In tracking mode
operation, Vref should be tied to Gnd.
Output of error amplifier. An external resistor and capacitor network is typically
connected from this pin to Fb to provide loop compensation.
Signal ground for internal reference and control circuitry.
Multi‐function pin to set switching frequency. Use an external resistor from this
pin to Gnd to set the free‐running switching frequency. Or use an external clock
signal to connect to this pin through a diode, the device’s switching frequency is
synchronized with the external clock.
Soft start/stop control. A high logic input enables the device to go into the
internal soft start; a low logic input enables the output soft discharged. Pull this
pin high if this function is not used.
Power Good status pin. Output is open drain. Connect a pull up resistor (49.9k)
from this pin to the voltage lower than or equal to the Vcc.
Sense pin for over‐voltage protection and PGood. It is optional to tie this pin to
FB pin directly instead of using a resistor divider from Vout.
Input voltage for Internal LDO. A 1.0µF capacitor should be connected between
this pin and PGnd. If external supply is connected to Vcc/LDO_out pin, this pin
should be shorted to Vcc/LDO_out pin.
Input Bias for external Vcc Voltage/ output of internal LDO. Place a minimum
2.2µF cap from this pin to PGnd.
Power Ground. This pin serves as a separated ground for the MOSFET drivers
and should be connected to the system’s power ground plane.
Switch node. This pin is connected to the output inductor.
Input voltage for power stage.
Supply voltage for high side driver, a 100nF capacitor should be connected
between this pin and SW pin.
Enable pin to turn on and off the device, if this pin is connected to PVin pin
through a resistor divider, input voltage UVLO can be implemented.
Input to error amplifier for tracking purposes. In the normal operation, it is left
floating and no external capacitor is required. In the sequencing or the tracking
mode operation, an external signal can be applied as the reference.
Signal ground for internal reference and control circuitry.
- 4 -
4A Highly Integrated SupIRBuck
PIN DESCRIPTION
TM
IR3897
PD‐97663