HCS361_11 MICROCHIP [Microchip Technology], HCS361_11 Datasheet - Page 7

• Manufacturer Part Number: HCS361_11
• Manufacturer: MICROCHIP [Microchip Technology]

3.5
The Configuration Word is a 16-bit word stored in
EEPROM array that is used by the device to store
information used during the encryption process, as well
as the status of option configurations. Further
explanations of each of the bits are described in the
following sections.
TABLE 3-1:
3.5.1
MOD selects between VPWM modulation and PWM
modulation format.
the following:
1.
2.
If MOD = 0, PWM modulation is selected.
3.5.2
BSEL selects the baud rate. If BSEL = 1, the baud rate
is nominally 1667 bits per second and with BSEL = 0,
833 bits per second.
3.5.3
In PWM mode, this bit selects the bit format.
If TXWAK = 0, the PWM pulse duty cycle is 1/3-2/3.
If TXWAK = 1, the PWM pulse duty cycle is 1/6-2/6.
© 2011 Microchip Technology Inc.
If MOD = 1, VPWM modulation is selected as well as
Bit Number Symbol
Enables the TXWAK bit to select the WAKE-UP
transmission.
Extends the Guard Time.
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
CONFIG
(Configuration Word)
MOD: MODULATION FORMAT
BSEL: BAUD RATE SELECT
TXWAK: BIT FORMAT SELECT OR
WAKE-UP
TXWAK PWM mode: 1/6, 2/6 or 1/3,
TMPSD
USRA0
USRA1
USRB0
USRB1
BACW
DELM
SEED
XSER
BSEL
TIMO
MOD
SPM
OVR
IND
CONFIGURATION WORD
Blank Alternate Code Word
Seed Transmission enable
Independent mode enable
Modulation format select
Extended serial number
VPWM mode: Wake-up
Sync Pulse Modulation
Baud Rate Selection
Delay mode enable
transmission enable
Time-out enable
Temporary seed
Bit Description
Overflow bit
2/3 select
User bit
User bit
User bit
User bit
enable
enable
In VPWM mode, this bit enables the wake-up signal.
If TXWAK = 0, transmissions start normally with the
preamble portion of the code word.
If TXWAK = 1, transmissions start with a Wake-up
sequence followed by a dead time (see Figure 4-2).
The following tables summarize the combined effect of
TXWAK, BSEL and MOD option bits.
TABLE 3-1:
TABLE 3-2:
3.5.4
Select Modulation mode of Sync Pulse. If SPM = 1, the
sync pulse is modulated (Figure 4-1 and Figure 4-2).
3.5.5
The overflow bit is used to extend the number of possi-
ble synchronization values. The synchronization coun-
ter is 16 bits in length, yielding 65,536 values before the
cycle repeats. Under typical use of 10 operations a day,
this will provide nearly 18 years of use before a
repeated value will be used. Should the system
designer conclude that is not adequate, then the over-
flow bit can be utilized to extend the number of unique
values. This can be done by programming OVR to 1 at
the time of production. The encoder will automatically
clear OVR the first time that the transmitted synchroni-
zation value wraps from 0xFFFF to 0x0000. Once
cleared, OVR cannot be set again, thereby creating a
permanent record of the counter overflow. This pre-
vents fast cycling of 64K counter. If the decoder system
is programmed to track the overflow bits, then the effec-
tive number of unique synchronization values can be
extended to 128K. If programmed to zero, the system
will be compatible with old encoder devices.
MOD TXWAK
MOD TXWAK
Note:
0
0
0
0
1
1
1
1
The Wake-up sequence is transmitted
before the first code word of each trans-
mission only.
SPM: SYNC PULSE MODULATION
OVR: OVERFLOW
0
0
1
1
0
0
1
1
PWM OPTIONS
VPWM OPTIONS
BSEL
BSEL
0
1
0
1
0
1
0
1
400us
200us
200us
100us
400us
200us
400us
200us
T
T
E
E
HCS361
DS40146F-page 7
Duty Cycle
Wake-up
1/3-2/3
1/3-2/3
1/6-2/6
1/6-2/6
YES
YES
NO
NO