RF6001_1 RFMD [RF Micro Devices], RF6001_1 Datasheet - Page 60
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RF6001_1
Manufacturer Part Number
RF6001_1
Description
FRACTIONAL-N RF SYNTHESIZER WITH MODULATOR AND DIGITAL IF FILTER
Manufacturer
RFMD [RF Micro Devices]
Datasheet
1.RF6001_1.pdf
(70 pages)
RF6001
Part of the POLARIS™ TOTAL RADIO™ Solution
PA Ramp Registers 3 through 11 (PARMP3-PARMP11) - Addresses 001011 to 010011
DAC1 Control Register (DAC1) - Address 010100
DAC2 Control Register (DAC2) - Address 010101
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PARMP10(17:12)
PARMP11(17:10)
PARMP10(11:2)
PARMP3(17:16)
PARMP4(17:14)
PARMP5(17:12)
PARMP6(17:10)
PARMP8(17:16)
PARMP9(17:14)
PARMP3(15:6)
PARMP4(13:4)
PARMP5(11:2)
PARMP8(15:6)
PARMP9(13:4)
PARMP10(1:0)
PARMP11(9:0)
PARMP7(17:8)
PARMP3(5:0)
PARMP4(3:0)
PARMP5(1:0)
PARMP6(9:0)
PARMP7(7:0)
PARMP8(5:0)
PARMP9(3:0)
DAC1(15:0)
DAC2(15:0)
Location
Location
Location
DAC1(17)
DAC1(16)
DAC2(17)
DAC2(16)
DAC1V(15:0)
DAC2V(15:0)
PAR[10,9:4]
PAR[10,3:0]
PAR[11,9:0]
PAR[12,9:6]
PAR[12,5:0]
PAR[13,9:0]
PAR[14,9:8]
PAR[15,9:0]
PAR[14,7:0]
Bit Name
PAR[0,9:0]
PAR[1,9:4]
PAR[1,3:0]
PAR[2,9:0]
PAR[3,9:6]
PAR[3,5:0]
PAR[4,9:0]
PAR[5,9:8]
PAR[5,7:0]
PAR[6,9:0]
PAR[7,9:0]
PAR[8,9:2]
PAR[8,1:0]
PAR[9,9:0]
Bit Name
Bit Name
TXENFSD
reserved
DAC1EN
DAC2EN
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FNZ
Default
Default
Default
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147Bh
0
0
0
0
0
0
reserved, program to zero (0)
PA Ramp Waveform, step 0
PA Ramp Waveform, step 1
PA Ramp Waveform, step 1, cont.
PA Ramp Waveform, step 2
PA Ramp Waveform, step 3
PA Ramp Waveform, step 3, cont.
PA Ramp Waveform, step 4
PA Ramp Waveform, step 5
PA Ramp Waveform, step 5, cont.
PA Ramp Waveform, step 6
PA Ramp Waveform, step 7
PA Ramp Waveform, step 8
PA Ramp Waveform, step 8, cont.
PA Ramp Waveform, step 9
PA Ramp Waveform, step 10
PA Ramp Waveform, step 10, cont.
PA Ramp Waveform, step 11
PA Ramp Waveform, step 12
PA Ramp Waveform, step 12, cont.
PA Ramp Waveform, step 13
PA Ramp Waveform, step 14
PA Ramp Waveform, step 14, cont.
PA Ramp Waveform, step 15
DAC1 Enable, this bit unconditionally turns on DAC1. Should be programmed to
0=disable
1=enabled
TXEN Failsafe Disable. The failsafe circuitry prevents TXEN from staying high for
0=TXEN failsafe circuit enabled
1=TXEN failsafe circuit disabled
DAC1 Value
If PAEN=1, then DAC1V(15:0) is used as the minimum value of the
DAC2 Enable
0=disable
1=enabled
If programmed high, the modulation to the fractional divider is forced to zero.
DAC2 Value
zero (0) for normal PA operation (PAEN=1).
more than eight timeslots, to prevent PA damage.
DAC1/VRAMP pin output voltage.
This is a test mode.
Function
Function
Function
Rev A3 DS050929