KS8695P_11 MICREL [Micrel Semiconductor], KS8695P_11 Datasheet - Page 21
KS8695P_11
Manufacturer Part Number
KS8695P_11
Description
Integrated Multi-Port PCI Gateway Solution
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
1.KS8695P_11.pdf
(42 pages)
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Memory Interface
The KS8695P has a glueless interface for SDRAM and static memory, i.e. ROM, SRAM, and Flash. It supports up to two
banks of static memory (Figure 7), up to two banks of SDRAM (Figure 8), and three banks of external I/O (Figure 9). The
total address space for the KS8695P is 64MB. This includes SDRAM, static memory, external I/O, and the KS8695P's
own 64KB of register space.
The memory interface for the SDRAM and static memory has a special automatic address mapping feature. This allows
the designer to connect address bit 0 on the memory to ADDR[0] on the KS8695P and address bit 1 on the memory to
ADDR[1] on the memory, regardless of whether the designer is trying to achieve word, half word, or byte addressing.
The KS8695P memory controller performs the address mapping internally. This permits the designer to use the maximum
amount of address bits, instead of losing one or two bits because of address mapping. For external I/O, however, the
designer still needs to take care of the address mapping (see Figure 9).
Micrel, Inc.
May 2006
Figure 7. Static Memory Interface Examples
21
M9999-051806
KS8695P
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