ATMEGA169 ATMEL [ATMEL Corporation], ATMEGA169 Datasheet - Page 143
ATMEGA169
Manufacturer Part Number
ATMEGA169
Description
8-bit Microcontroller with 16K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA169.pdf
(365 pages)
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Serial Peripheral
Interface – SPI
2514P–AVR–07/06
The Serial Peripheral Interface (SPI) allows high-speed synchronous data transfer
between the ATmega169 and peripheral devices or between several AVR devices. The
ATmega169 SPI includes the following features:
•
•
•
•
•
•
•
•
The PRSPI bit in “Power Reduction Register - PRR” on page 34 must be written to zero
to enable SPI module.
Figure 65. SPI Block Diagram
Note:
The interconnection between Master and Slave CPUs with SPI is shown in Figure 66.
The system consists of two shift Registers, and a Master clock generator. The SPI Mas-
ter initiates the communication cycle when pulling low the Slave Select SS pin of the
desired Slave. Master and Slave prepare the data to be sent in their respective shift
Registers, and the Master generates the required clock pulses on the SCK line to inter-
change data. Data is always shifted from Master to Slave on the Master Out – Slave In,
MOSI, line, and from Slave to Master on the Master In – Slave Out, MISO, line. After
Full-duplex, Three-wire Synchronous Data Transfer
Master or Slave Operation
LSB First or MSB First Data Transfer
Seven Programmable Bit Rates
End of Transmission Interrupt Flag
Write Collision Flag Protection
Wake-up from Idle Mode
Double Speed (CK/2) Master SPI Mode
/2/4/8/16/32/64/128
1. Refer to Figure 1 on page 2, and Table 30 on page 63 for SPI pin placement.
DIVIDER
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ATmega169/V
143
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