T89C51CC01CA ATMEL [ATMEL Corporation], T89C51CC01CA Datasheet

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T89C51CC01CA

Manufacturer Part Number
T89C51CC01CA
Description
80C51 MCUs
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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Active T89C51CC01 Errata List
T89C51CC01 Errata History
T89C51CC01 Errata Description
1. Flash/EEPROM – First Read After Write Disturbed
2. Buffer Noise
3. Double IT on External Falling Edge on INT1 or INT0 in X2 Mode
Lot Number
A00151
A00369
A00367, A00368,
A00396 to A00529
A00510, all lots from A00588
Flash/EEPROM – First Read After Write Disturbed
Flash/EEPROM – First Read After Load Disturbed
Timer 2 – Baud Rate Generator – No IT When TF2 is Set by Software
Timer 2 – Baud Rate Generator – Long Start Time
UART – RB8 Lost with JBC on SCON Register
ADC – Interrupt During Idle Conversion
After a write of more than 32 bytes in the EEPROM and 16 bytes in the User Flash
memory, the read of the first byte may be disturbed if it occurs just after the write.
Workaround
Do not load/write more than 32 bytes at a time for EEPROM memory.
Do not load/write more than 16 bytes at a time for User Flash memory,
OR perform a “dummy” read before reading the first byte,
OR wait 10 ms before reading the first byte.
Large bounces and high noise are generated when buffers are switching (both ris-
ing and falling edges).
Workaround
None.
When the CPU is in X2 mode and Timer1 or Timer 0 in X1 mode (CKCON =
0x7F), IEx flag is not cleared by hardware after servicing interrupt. In this case,
the CPU executes the ISR a second time.
Workaround
The workaround is to clear IEx bit in Interrupt subroutine.
INT1_ISR :
CLR IE1
....
Errata List
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 12
1, 3, 4, 5, 6, 7, 8, 9, 10, 12
1, 3, 5, 6, 7, 8, 9, 10, 12
1, 7, 8, 9,10, 11, 12
; Interrupt sub routine
80C51 MCUs
T89C51CC01UA
T89C51CC01CA
Errata Sheet
Rev. 4131C–8051–11/02
1

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T89C51CC01CA Summary of contents

Page 1

... IEx flag is not cleared by hardware after servicing interrupt. In this case, the CPU executes the ISR a second time. Workaround The workaround is to clear IEx bit in Interrupt subroutine. INT1_ISR : CLR IE1 .... ; Interrupt sub routine 80C51 MCUs T89C51CC01UA T89C51CC01CA Errata Sheet Rev. 4131C–8051–11/02 1 ...

Page 2

Movc Instruction on Boot Memory from Boot Memory Does Not Work No movc instruction is performed when a program running on the boot memory tries to read its own code using a movc instruction. Workaround None. 5. Power OFF ...

Page 3

CAN – CANCONCH Harmless Corruption The fix for Errata number 6 (Lost CAN Error Interrupt), fixes the problem. However, when the stuff error occurs, the CONCH1, CONCH0 bits in CANCONCH are corrupted. This corruption has no effect on the ...

Page 4

Active UART Bootloader Errata List • Timer 2 and UART Are Not Stopped • Watchdog and Flash API Starting the Bootloader Execution • Autobaud False Start Bit Detection • Boot Process Compatibility • Flash api “__api_wr_code_page” with 0 data in ...

Page 5

Workaround A ‘Special Sync’ can be used with ‘FLIP’ software. In this case, the open port event and the ‘U’ sent are dissociated. The user must first open his COM port with the ‘con- nect’ button, then reset its hardware ...

Page 6

Flash API “__api_wr_code_page” with 0 data in length parameter field When the flash api “__api_wr_code_page” is called with the field nb_data equal 0 then 255 data are wrote in flash. Workaround Include a test on nb_data before executed __api_wr_code_page ...

Page 7

Active CAN Bootloader Errata List • The CAN is Not Stopped • Watchdog and Flash API Starting the Bootloader Execution • Flash api “__api_wr_code_page” with 0 data in length parameter field CAN Bootloader Errata History Version Number 1.0.4 CAN Bootloader ...

Page 8

Atmel Headquarters Corporate Headquarters 2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 441-0311 FAX 1(408) 487-2600 Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland TEL (41) 26-426-5555 FAX (41) 26-426-5500 Asia Room 1219 Chinachem ...

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