T89C51RD2-3CSCL ATMEL [ATMEL Corporation], T89C51RD2-3CSCL Datasheet - Page 76

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T89C51RD2-3CSCL

Manufacturer Part Number
T89C51RD2-3CSCL
Description
0 to 40 MHz Flash Programmable 8-bit Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Set-up modes configuration
76
PEULCK
PELCK
Mode
Name
PGMC
PGML
PGMV
PGMS
CERR
PGXC
PGXL
RXAF
TMS
VSB
T89C51RD2
Mode
Program or Erase Lock.
Disable the Erasure or Programming access
Program or Erase UnLock.
Enable the Erasure or Programming access
Write Code Data (byte)
or write Page
Always precedeed by PGML
Memory Page Load
(up to 128 bytes)
Read Code Data (byte)
Read Security Byte (=HSB)
Write Security Byte (Note 3)
(security byte = HSB)
Chip Erase User + XAF
Write Byte or Page in Extra Memory (XAF)
Always precedeed by PGXL
Memory Page Load XAF
(up to 128 bytes)
Read Signature bytes
30h (Manufacturer code)
31h (Device ID #1)
60h (Device ID #2)
61h (Device ID #3)
Read Extra Memory (XAF)
Control and program signals must be held at the levels indicated in the two following
tables.
Rst
1
1
1
1
1
1
1
1
1
1
1
1
Psen
0
0
0
0
0
0
0
0
0
0
0
0
Internally
Internally
100 ms
Note 2
Note 1
Note 1
10 ms
timed
timed
Ale
_ _
|_|
_ _
_ _
_ _
|_|
|_|
|_|
1
1
1
1
EA
1
1
1
1
1
1
1
1
1
1
1
1
P2.6
1
1
0
0
0
0
1
1
1
1
0
0
P2.7
_ _
_ _
_ _
_ _
|_|
|_|
|_|
|_|
0
0
1
1
1
0
1
1
P3.6
1
1
1
0
1
0
0
0
0
0
0
0
P3.7
4243G–8051–05/03
0
0
1
1
1
1
0
0
1
1
0
0
P0[7..0]
Dout =
55-AA
Dout
Dout
Dout
D7h
FCh
FFh
58h
Din
Din
Din
xx
xx
xx
xx

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