P89LPC934 PHILIPS [NXP Semiconductors], P89LPC934 Datasheet - Page 43

• Manufacturer Part Number: P89LPC934
• Description: 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable Flash with 8-bit A/D converters
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
9397 750 15113
Product data sheet
Fig 17. SPI block diagram
SPI STATUS REGISTER
BY 4, 16, 64, 128
CPU clock
DIVIDER
SELECT
SPI CONTROL
8.22 SPI
The P89LPC933/934/935/936 provides another high-speed serial communication
interface—the SPI interface. SPI is a full-duplex, high-speed, synchronous communication
bus with two operation modes: Master mode and Slave mode. Up to 3 Mbit/s can be
supported in Master mode or up to 2 Mbit/s in Slave mode. It has a Transfer Completion
Flag and Write Collision Flag Protection.
The SPI interface has four pins: SPICLK, MOSI, MISO and SS:
Typical connections are shown in
•
•
SPICLK, MOSI and MISO are typically tied together between two or more SPI
devices. Data flows from master to slave on MOSI (Master Out Slave In) pin and flows
from slave to master on MISO (Master In Slave Out) pin. The SPICLK signal is output
in the master mode and is input in the slave mode. If the SPI system is disabled, i.e.,
SPEN (SPCTL.6) = 0 (reset value), these pins are configured for port functions.
SS is the optional slave select pin. In a typical configuration, an SPI master asserts
one of its port pins to select one SPI device as the current slave. An SPI slave device
uses its SS pin to determine whether it is selected.
interrupt
request
SPI clock (master)
SPI
MSTR
SPEN
internal
Rev. 06 — 20 June 2005
data
bus
8-bit microcontroller with accelerated two-clock 80C51 core
SPI CONTROL REGISTER
8-BIT SHIFT REGISTER
READ DATA BUFFER
CLOCK LOGIC
Figure 18
P89LPC933/934/935/936
clock
through
Figure
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
20.
M
M
M
S
S
S
CONTROL
LOGIC
PIN
002aaa900
MISO
P2.3
MOSI
P2.2
SPICLK
P2.5
SS
P2.4
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