P87C52 PHILIPS [NXP Semiconductors], P87C52 Datasheet - Page 2

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P87C52

Manufacturer Part Number
P87C52
Description
80C51 8-bit microcontrollers 16K/32K, 512 OTP, I2C, watchdog timer
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheets

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Philips Semiconductors
DESCRIPTION
The Philips 80C51/87C51/80C52/87C52 is a high-performance
static 80C51 design fabricated with Philips high-density CMOS
technology with operation from 2.7 V to 5.5 V.
The 8xC51 and 8xC52 contain a 128
respectively, 32 I/O lines, three 16-bit counter/timers, a six-source,
four-priority level nested interrupt structure, a serial I/O port for
either multi-processor communications, I/O expansion or full duplex
UART, and on-chip oscillator and clock circuits.
In addition, the device is a low power static design which offers a
wide range of operating frequencies down to zero. Two software
selectable modes of power reduction—idle mode and power-down
mode are available. The idle mode freezes the CPU while allowing
the RAM, timers, serial port, and interrupt system to continue
functioning. The power-down mode saves the RAM contents but
freezes the oscillator, causing all other chip functions to be
inoperative. Since the design is static, the clock can be stopped
without loss of user data and then the execution resumed from the
point the clock was stopped.
SELECTION TABLE
For applications requiring more ROM and RAM, see the 8XC54/58
and 8XC51RA+/RB+/RC+/80C51RA+ data sheet.
Note: 80C31/80C32 is specified in separate data sheet.
80C31*/80C51/87C51
0K/4K
80C32*/80C52/87C52
0K/8K/16K/32K
80C51RA+/8XC51RA+/RB+/RC+
0K/8K/16K/32K
8XC51RD+
64K
2000 Aug 07
ROM/EPROM
Memory Size
80C51 8-bit microcontroller family
4 K/8 K OTP/ROM low voltage (2.7 V–5.5 V),
low power, high speed (33 MHz), 128/256 B RAM
(X by 8)
RAM Size
(X by 8)
1024
128
256
512
Programmable
Timer Counter
8 RAM and 256
(PCA)
Yes
Yes
No
No
Watch Dog
Hardware
8 RAM
Timer
Yes
Yes
No
No
2
FEATURES
8051 Central Processing Unit
– 4k
– 8k
– 128
– 256
– Three 16-bit counter/timers
– Boolean processor
– Full static operation
– Low voltage (2.7 V to 5.5 V@ 16 MHz) operation
Memory addressing capability
– 64k ROM and 64k RAM
Power control modes:
– Clock can be stopped and resumed
– Idle mode
– Power-down mode
CMOS and TTL compatible
TWO speed ranges at V
– 0 to 16 MHz
– 0 to 33 MHz
Three package styles
Extended temperature ranges
Dual Data Pointers
Security bits:
– ROM (2 bits)
– OTP/EPROM (3 bits)
Encryption array – 64 bytes
4 level priority interrupt
6 interrupt sources
Four 8-bit I/O ports
Full–duplex enhanced UART
– Framing error detection
– Automatic address recognition
Programmable clock out
Asynchronous port reset
Low EMI (inhibit ALE and slew rate controlled outputs)
Wake-up from Power Down by an external interrupt
8 ROM (80C51)
8 ROM (80C52)
8 RAM (80C51)
8 RAM (80C52)
80C51/87C51/80C52/87C52
CC
= 5 V
Product specification
853–0169 24291

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