EP9312-EB CIRRUS [Cirrus Logic], EP9312-EB Datasheet - Page 15

• Manufacturer Part Number: EP9312-EB
• Description: Universal Platform System-on-chip Processor
• Manufacturer: CIRRUS [Cirrus Logic]

Memory Interface
Figure 2
values for the timings of each of the SDRAM modes.
SDRAM Load Mode Register Cycle
DS515PP7
SDCLK high time
SDCLK low time
SDCLK rise/fall time
Signal delay from SDCLK rising edge time
Signal hold from SDCLK rising edge time
DQMn delay from SDCLK rising edge time
DQMn hold from SDCLK rising edge time
DA valid setup to SDCLK rising edge time
DA valid hold from SDCLK rising edge time
SDWEn
SDCLK
SDCSn
DQMn
RASn
CASn
AD
DA
through
Figure 5
t
clkrf
define the timings associated with all phases of the SDRAM. The following table contains the
Parameter
Figure 2. SDRAM Load Mode Register Cycle Timing Measurement
©
t
d
Copyright 2005 Cirrus Logic (All Rights Reserved)
OP-Code
t
h
Symbol
t
t
clk_high
clk_low
t
t
t
t
t
DQd
DQh
DAh
clkrf
DAs
t
t
d
h
Min
t
clk_low
1
1
2
3
-
-
-
-
-
Universal Platform SOC Processor
(t
(t
HCLK
HCLK
Typ
2
-
-
-
-
-
-
t
clk_high
) / 2
) / 2
Max
4
8
8
-
-
-
-
-
-
EP9312
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
15