ST7FMC1K2B3 STMICROELECTRONICS [STMicroelectronics], ST7FMC1K2B3 Datasheet - Page 97
ST7FMC1K2B3
Manufacturer Part Number
ST7FMC1K2B3
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.ST7FMC1K2B3.pdf
(309 pages)
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A basic example of interconnections between a
single master and a single slave is illustrated in
Figure
The MOSI pins are connected together and the
MISO pins are connected together. In this way
data is transferred serially between master and
slave (most significant bit first).
The communication is always initiated by the mas-
ter. When the master device transmits data to a
slave device via MOSI pin, the slave device re-
sponds by sending data to the master device via
56.
MSBit
GENERATOR
8-bit SHIFT REGISTER
CLOCK
SPI
LSBit
(cont’d)
MOSI
SCK
SS
MISO
+5V
the MISO pin. This implies full duplex communica-
tion with both data out and data in synchronized
with the same clock signal (which is provided by
the master device via the SCK pin).
To use a single data line, the MISO and MOSI pins
must be connected at each node (in this case only
simplex communication is possible).
Four possible data/clock timing relationships may
be chosen (see
and slave must be programmed with the same tim-
ing mode.
MISO
MOSI
SCK
SS
Figure 59 on page
MSBit
Not used if SS is managed
by software
8-bit SHIFT REGISTER
100) but master
LSBit
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