M38867E8AHP MITSUBISHI [Mitsubishi Electric Semiconductor], M38867E8AHP Datasheet - Page 50

• Manufacturer Part Number: M38867E8AHP
• Description: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER??
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

(2) START condition generating procedure using multi-master
1. Procedure example (The necessary conditions of the generat-
2. Use “Branch on Bit Set” of “BBS 5, $0014, –” for the BB flag
3. Use “STA $12, STX $12” or “STY $12” of the zero page ad-
4. Execute the branch instruction of above 2 and the store instruc-
5. Disable interrupts during the following three process steps:
(3) RESTART condition generating procedure
This cannot be applied when the external memory is used and the
bus cycle is extended by ONW function.
1. Procedure example (The necessary conditions of the generat-
2. Select the slave receive mode when the PIN bit is “0.” Do not
3. The S
4. Disable interrupts during the following two process steps:
50
• Writing of slave address value
• Trigger of RESTART condition generating
• BB flag confirming
• Writing of slave address value
• Trigger of START condition generating
When the condition of the BB flag is bus busy, enable interrupts
immediately.
ing procedure are described as the following 2 to 5.
cess)
BUSFREE:
BUSBUSY:
confirming and branch process.
dressing instruction for writing the slave address value to the
I
tion of above 3 continuously shown the above procedure
example.
ing procedure are described as the following 2 to 4.)
Execute the following procedure when the PIN bit is “0.”
write “1” to the PIN bit. Neither “0” nor “1” is specified for the
writing to the BB bit.
The TRX bit becomes “0” and the S
the I
2
LDA —
SEI
BBS 5, S1, BUSBUSY (BB flag confirming and branch pro-
STA S0
LDM #$F0, S1
CLI
CLI
LDM #$00, S1
LDA —
SEI
STA S0
LDM #$F0, S1
CLI
C data shift register.
2
C data shift register.
CL
pin is released by writing the slave address value to
(Taking out of slave address value)
(Interrupt disabled)
(Writing of slave address value)
(Trigger of START condition generating)
(Interrupt enabled)
(Interrupt enabled)
(Select slave receive mode)
(Taking out of slave address value)
(Interrupt disabled)
(Writing of slave address value)
(Trigger of RESTART condition generating)
(Interrupt enabled)
DA
pin is released.
(4) Writing to I
Do not execute an instruction to set the PIN bit to “1” from “0” and
an instruction to set the MST and TRX bits to “0” from “1” simulta-
neously. It is because it may enter the state that the S
released and the S
cycle. Do not execute an instruction to set the MST and TRX bits
to “0” from “1” simultaneously when the PIN bit is “1.” It is because
it may become the same as above.
(5) Process of after STOP condition generating
Do not write data in the I
tus register S1 until the bus busy flag BB becomes “0” after
generating the STOP condition in the master mode. It is because
the STOP condition waveform might not be normally generated.
Reading to the above registers do not have the problem.
(6) STOP condition input at 7th clock pulse
In the slave mode, the STOP condition is input at the 7th clock
pulse while receiving a slave address or data. As the clock pulse
is continuously input, the SDA line may be held at LOW even if
flag BB is set to “0” (only for M38867M8A and M38867E8).
Countermeasure:
Write dummy data to the I
the S1D register (ES0 = “L”
interrupt routine with flag PIN = “1”.
Note: Do not use the read-modify-write instruction at this time.
(7) ES0 bit switch
In standard clock mode when SSC = “00010
clock mode, flag BB may switch to “1” if ES0 bit is set to “1” when
SDA is “L”.
Countermeasure:
Set ES0 to “1” when SDA is “H”.
Furthermore, when the ES0 bit is set to “0”, it becomes a
general-purpose port; so that the port must be set to input
mode or “H”.
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
2
C status register
DA
MITSUBISHI MICROCOMPUTERS
pin is released after about one machine
2
C data shift register S0 and the I
2
C shift register or reset the ES0 bit in
ES0 = “H”) during a stop condition
3886 Group
2
” or in high-speed
CL
2
C sta-
pin is