M38867E8AHP MITSUBISHI [Mitsubishi Electric Semiconductor], M38867E8AHP Datasheet - Page 61

• Manufacturer Part Number: M38867E8AHP
• Description: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER??
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

PROCESSOR MODE
Single-chip mode, memory expansion mode, and microprocessor
mode in the M38867M8A/E8A can be selected by changing the
contents of the processor mode bits (CM
address 003B
mode, memory can be expanded externally through ports P0 to
P3. In these modes, ports P0 to P3 lose their I/O port functions
and become bus pins.
Table 15 Port functions in memory expansion mode and
Note : If CNV
(1) Single-chip mode
Select this mode by resetting the microcomputer with CNV
nected to V
(2) Memory expansion mode
Select this mode by setting the processor mode bits (b1, b0) to
“01” in software with CNV
external memory expansion while maintaining the validity of the in-
ternal ROM.
However, do not set this mode in the M38869M8A/MCA/MFA and
the flash memory version.
(3) Microprocessor mode
Select this mode by resetting the microcomputer with CNV
nected to V
software with CNV
the internal ROM is no longer valid and external memory must be
used.
Do not set this mode in the M38869M8A/MCA/MFA and the flash
memory version.
Port Name
Port P0
Port P1
Port P2
Port P3
chip mode after a reset, so that this pin cannot be used as the
RESET
microprocessor mode
SS
CC
SS
OUT
16
.
, or by setting the processor mode bits to “10” in
Outputs low-order 8 bits of address.
Outputs high-order 8 bits of address.
Operates as I/O pins for data D
(including instruction code).
P3
(except that the port latch cannot be read).
P3
P3
P3
P3
P3
put pin.
is connected to V
). In memory expansion mode and microprocessor
output pin.
0
2
3
4
5
6
SS
and P3
is the ONW input pin.
is the RESET
is the
is the SYNC output pin.
is the WR output pin, and P3
connected to V
SS
1
output pin.
function only as output pins
connected to V
SS
OUT
, the microcomputer goes to single-
Function
output pin. (Note)
SS
. In microprocessor mode,
0
and CM
SS
. This mode enables
7
to D
7
is the RD out-
1
0
: b1 and b0 of
SS
SS
con-
con-
Fig. 62 Memory maps in various processor modes
Fig. 63 Structure of CPU mode register
b 7
0 0 0 0
0 0 0 8
0 0 4 0
X X X X
Y Y Y Y
F F F F
T h e s h a d e d a r e a a r e e x t e r n a l m e m o r y a r e a .
* :
N o t e : T h i s i s n o t a v a i l a b l e f o r t h e p r o d u c t s e x c e p t
X X X X 1 6 i n d i c a t e s t h e l a s t a d d r e s s o f i n t e r n a l R A M .
Y Y Y Y 1 6 i n d i c a t e s t h e f i r s t a d d r e s s o f i n t e r n a l R O M .
1 6
1 6
1 6
M e m o r y e x p a n s i o n m o d e
1 6
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
1 6
1 6
M 3 8 8 6 7 M 8 A / E 8 A .
*
*
r e s e r v e d a r e a
I n t e r n a l R A M
I n t e r n a l R O M
S F R a r e a
b 0
C P U m o d e r e g i s t e r
( C P U M : a d d r e s s 0 0 3 B
MITSUBISHI MICROCOMPUTERS
P r o c e s s o r m o d e b i t s ( C M
b 1 b 0
0
0
1
1
S t a c k p a g e s e l e c t i o n b i t
0 : 0 p a g e
1 : 1 p a g e
0 : S i n g l e - c h i p m o d e
1 : M e m o r y e x p a n s i o n m o d e (N o t e)
0 : M i c r o p r o c e s s o r m o d e (N o t e)
1 : N o t a v a i l a b l e
X X X X
0 0 0 0
0 0 0 8
0 0 4 0
F F F F
1 6
1 6
1 6
1 6
1 6
M i c r o p r o c e s s o r m o d e
3886 Group
*
1 6
r e s e r v e d a r e a
I n t e r n a l R A M
)
S F R a r e a
1
, C M
0
)
61