EP7312-IB-90 CIRRUS [Cirrus Logic], EP7312-IB-90 Datasheet - Page 18

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EP7312-IB-90

Manufacturer Part Number
EP7312-IB-90
Description
High-performance, Low-power, System-on-chip with SDRAM & Enhanced with SDRAM & Enhanced
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet
EP7312
High-Performance, Low-Power System on Chip
SDRAM Burst Read Cycle
18
SDMWE
SDCLK
SDRAS
SDCAS
SDQM
ADDR
SDCS
DATA
[0:3]
Note:
1. Timings are shown with CAS latency = 2
2. The SDCLK signal may be phase shifted relative to the rest of the SDRAM control and data signals due to uneven loading.
Designers should take care to ensure that delays between SDRAM control and data signals are approximately equal.
t
t
CSd
RAd
t
t
CSa
RAa
ADRAS
t
ADv
Figure 4. SDRAM Burst Read Cycle Timing Measurement
©
Copyright Cirrus Logic, Inc. 2005
t
t
CSd
CAd
t
t
CSa
CAa
(All Rights Reserved)
t
ADv
ADCAS
t
DAs
D1
t
DAh
t
DAs
D2
t
DAh
t
DAs
D3
t
DAh
t
DAs
D4
t
DAh
DS508F1
t
RAnv

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