M34282E2GP MITSUBISHI [Mitsubishi Electric Semiconductor], M34282E2GP Datasheet - Page 19

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M34282E2GP

Manufacturer Part Number
M34282E2GP
Description
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheets

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RAM BACK-UP MODE
The 4282 Group has the RAM back-up mode.
When the POF instruction is executed, system enters the RAM
back-up state.
As oscillation stops retaining RAM, the functions and states of
reset circuit at RAM back-up mode, power dissipation can be
reduced without losing the contents of RAM. Table 7 shows the
function and states retained at RAM back-up. Figure 22 shows
the state transition.
(1) Warm start condition
(2) Cold start condition
(3) Identification of the start condition
Fig. 22 State transition
Fig. 23 Set source and clear source of the P flag
When the external wakeup signal is input after the system
enters the RAM back-up state by executing the POF
instruction, the CPU starts executing the software from address
0 in page 0. In this case, the P flag is “1.”
The CPU starts executing the software from address 0 in page
0 when any of the following conditions is satisfied .
• reset by power-on reset circuit is performed
• reset by watchdog timer is performed
• reset by voltage drop detection circuit is performed
In this case, the P flag is “0.”
Warm start (return from the RAM back-up state) or cold start
(return from the normal reset state) can be identified by
examining the state of the power down flag (P) with the SNZP
instruction.
Set source
Clear source
POF instruction
Reset
Stabilizing time a
Reset input
(Stabilizing time a )
POF instruction is executed
Reset input
Power down flag P
: Microcomputer starts its operation after f(X
S
R
Q
f(X
IN
) oscillation
A
MITSUBISHI
ELECTRIC
Table 7 Functions and states retained at RAM back-up
Fig. 24 Start condition identified example using the SNZP
Notes 1: “O” represents that the function can be retained, and
Program counter (PC), registers A, B,
carry flag (CY), stack pointer (SP) (Note 2)
Contents of RAM
Port CARR
Ports D
Ports E
Port G
Timer control registers V1, V2
Pull-down control registers PU0, PU1
Logic operation selection register LO
Timer 1 function, Timer 2 function
Timer underflow flags (T1F, T2F)
Watchdog timer (WDT)
Watchdog timer flags (WDF1, WDF2)
Most significant ROM code reference enable flag (URS)
(Stabilizing time a )
POF instruction
Return input
2:The stack pointer (SP) points the level of the stack
is executed
0
0
instruction
, E
–D
“ ” represents that the function is initialized.
Registers and flags other than the above are undefined
at RAM back-up, and set an initial value after returning.
register and is initialized to “11
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Software start
1
7
IN
Cold start
) is counted to16384 times.
P = “1”
?
Function
No
MITSUBISHI MICROCOMPUTERS
(RAM back-up
mode)
Yes
f(X
IN
) stop
B
4282 Group
Warm start
2
” at RAM back-up.
RAM back-up
O
O
O
O
O
19

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