XC6101 TOREX [Torex Semiconductor], XC6101 Datasheet - Page 12

• Manufacturer Part Number: XC6101
• Description: CMOS Voltage Detector
• Manufacturer: TOREX [Torex Semiconductor]

XC6101~XC6107, XC6111~XC6117 Series
■OPERATIONAL EXPLANATION
12/26
The XC6101~XC6107, XC6111~XC6117 series compare, using the error amplifier, the voltage of the internal voltage
reference source with the voltage divided by R1, R2 and R3 connected to the V
error amplifier activates the watchdog logic, manual reset logic, delay circuit and the output driver. When the V
gradually falls and finally reaches the detect voltage, the RESETB pin output goes from high to low in the case of the V
ICs, and the RESET pin output goes from low to high in the case of the V
<RESETB / RESET Pin Output Signal>
* V
The RESETB pin output goes from high to low whenever the V
MRB pin is driven from high to low. The RESETB pin remains low for the release delay time (T
reaches the release voltage. If neither rising nor falling signals are applied to the WD pin within the watchdog timeout period,
the RESETB pin output remains low for the release delay time (T
* V
The RESET pin output goes from low to high whenever the V
MRB pin is driven from high to low. The RESET pin remains high for the release delay time (T
reaches the release voltage. If neither rising nor falling signals are applied to the WD pin within the watchdog timeout period,
the V
<Hysteresis>
When the internal comparator output is high, the NMOS transistor connected in parallel to R3 is turned ON, activating the
hysteresis circuit. The difference between the release and detect voltages represents the hysteresis range, as shown by the
following calculations:
Hysteresis range is selectable from V
<Watchdog (WD) Pin>
The XC6101~XC6107, XC6111~XC6117 series use a watchdog timer to detect malfunction or “runaway” of the
microprocessor. If neither rising nor falling signals are applied from the microprocessor within the watchdog timeout period,
the RESETB/RESET pin output maintains the detection state for the release delay time (T
RESET/RESETB pin output returns to the release state (Please refer to the FUNCTION CHART). The timer in the watchdog
is then
6.25msec.
<MRB Pin>
Using the MRB pin input, the RESET/RESETB pin signal can be forced to the detection state. When the MRB pin is driven
from high to low, the RESETB pin output goes from high to low in the case of the V
goes from low to high in the case of the V
output maintains the detection state for the release delay time (T
voltage level, leave the MRB pin open if unused (Please refer to the FUNCTION CHART). A diode, which is an input
protection element, is connected between the MRB pin and V
V
on the MRB pin.
<Release Delay Time>
Release delay time (T
timeout period expires with no rising signal applied to the WD pin, until the RESET/RESETB pin output is released from the
detection state.
200msec, 100msec, 50msec, 25msec, 3.13msec.
<Detect Delay Time>
Detect Delay Time (T
RESETB pin output goes into the detection state.
IN
DFL
DFH
, the current will flow to V
V
V
V
V
OUT
* Detect voltage (V
* Please refer to the block diagrams for R1, R2, R3 and Vref.
DF
DR
HYS
DR
(RESETB) type - output signal: Low when detected.
(RESET) type – output signal: High when detected.
restarted.
(detect voltage) = (R1+R2+R3) x Vref(R2+R3)
(release voltage) = (R1+R2) x Vref(R2)
> V
pin output remains high for the release delay time (T
(hysteresis range)=V
DF
Seven release delay time (T
Six watchdog timeout period settings are available in 1.6sec, 400msec, 200msec, 100msec, 50msec,
DF
DR
) is the time that elapses from when the V
DF
) is the time that elapses from when the V
) includes conditions of both V
IN
through the diode. Please use this IC within the stated maximum ratings (V
DR
-V
DF
DF
(V)
x 0.05V (XC6101~XC6107) or V
DFH
type. Even after the MRB pin is driven back high, the RESET/RESETB pin
DR
) watchdog timeout period settings are available in 1.6sec, 400msec,
DFL
(low when detected) and V
IN
DR
IN
pin. Therefore, if the MRB pin is applied voltage that exceeds
IN
), and thereafter the RESET pin outputs low level signal.
DR
DR
pin voltage falls below the detect voltage, or whenever the
pin voltage falls below the detect voltage, or whenever the
). Since the MRB pin is internally pulled up to the V
IN
), and thereafter the RESET pin outputs high level signal.
IN
pin reaches the release voltage, or when the watchdog
pin voltage falls to the detect voltage until the RESET/
DF
DFH
x 0.001V (XC6111~XC6117).
type ICs.
IN
pin. The resulting output signal from the
DFL
DFH
type ICs, and the RESET pin output
(high when detected).
DR
DR
) after the V
) after the V
DR
), and thereafter the
SS
-0.3 ~ V
IN
IN
IN
pin voltage
pin voltage
pin voltage
DFL
IN
IN
+0.3)
type
pin