X40420 XICOR [Xicor Inc.], X40420 Datasheet - Page 3

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X40420

Manufacturer Part Number
X40420
Description
Dual Voltage Monitor with Integrated CPU Supervisor and System Battery Switch
Manufacturer
XICOR [Xicor Inc.]
Datasheet

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X40420/X40421 – Preliminary
PIN DESCRIPTION (Continued)
REV 1.2.14 7/12/02
Pin
10
11
12
13
14
4
5
6
7
8
9
BATT-ON
RESET/
RESET
Name
V
WDO
V
SDA
SCL
V
V
MR
WP
BATT
OUT
SS
CC
WDO Output. WDO is an active LOW, open drain output which goes active whenever the watch-
dog timer goes active.
Manual Reset Input. Pulling the MR pin LOW initiates a system reset. The RESET/RESET pin will re-
main HIGH/LOW until the pin is released and for the t
RESET Output. (X40421) This open drain pin is an active LOW output which goes LOW whenever
V
grammed time period (t
and for t
RESET Output. (X40420) This pin is an active HIGH open drain output which goes HIGH when-
ever V
programmed time period (t
and for t
Ground
Serial Data. SDA is a bidirectional pin used to transfer data into and out of the device. It has an
open drain output and may be wire ORed with other open drain or open collector outputs. This pin
requires a pull up resistor and the input buffer is always active (not gated).
Watchdog Input. A HIGH to LOW transition on the SDA (while SCL is toggled from HIGH to LOW
and followed by a stop condition) restarts the Watchdog timer. The absence of this transition within
the watchdog time out period results in WDO going active.
Serial Clock. The Serial Clock controls the serial bus timing for data input and output.
Write Protect. WP HIGH prevents writes to any location in the device (including all the registers).
It has an internal pull down resistor. (>10M typical)
Battery Supply Voltage. This input provides a backup supply in the event of a failure of the
primary V
maintain the contents of SRAM and also powers the internal logic to “stay awake.” If the battery is
not used, connect V
Output Voltage. (V)
IF V
Note: There is hysteresis around V
switchover voltage. A capacitance of 0.1µF must be connected to V
Battery On. This CMOS output goes HIGH when the V
when V
and current requirements are greater than 50mA.
The purpose of this output is to drive an external transistor to get higher operating currents when
the V
V
to supply enough voltage and current to keep SRAM devices from losing their data–there is no
communication at this time.
Supply Voltage
CC
OUT
V
then V
else V
CC
falls below V
CC
OUT
pin and the external transistor is turned off. In this “backup condition,” the battery only needs
CC
OUT
< V
PURST
PURST
supply is fully functional. In the event of a V
CC
falls below V
= V
OUT
OUT
TRIP1
switches to V
voltage. The V
CC
= V
= V
thereafter.
thereafter.
if V
TRIP1
BATT
CC
BATT
CC
if V
TRIP1
PURST
> V
voltage or if manual reset is asserted. This output stays active for the pro-
(ie if V
CC
CC
to ground.
PURST
TRIP1
BATT
. It is used to drive an external PNP pass transistor when V
voltage or if manual reset is asserted. This output stays active for the
> V
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) on power up. It will also stay active until manual reset is released
CC
BATT
.
) on power up. It will also stay active until manual reset is released
voltage typically provides the supply voltage necessary to
< V
BATT
BATT
+ 0.03V
± 0.03V point to avoid oscillation at or near the
– 0.03V)
Function
PURST
CC
failure, the battery voltage is applied to the
OUT
thereafter. It has an internal pull up resistor.
switches to V
Characteristics subject to change without notice.
OUT
to ensure stability.
BATT
and goes LOW
CC
= V
OUT
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