ATA5278_06 ATMEL [ATMEL Corporation], ATA5278_06 Datasheet - Page 22

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ATA5278_06

Manufacturer Part Number
ATA5278_06
Description
Stand-alone Antenna Driver
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
3.18
3.19
3.20
Figure 3-16. Typical Application Circuit With ATA5278
22
receiver
(min. 7 V)
VBATT
LF
GND
MODACTIVE Output Pin
Internal Supply Unit
Application Hints
ATA5278
Data
Ant
L
C4
A
HVNMOS
R
D2
C5
Shunt
The MODACTIVE pin of the ATA5278 can be used to directly control a timer/counter stage of
the microcontroller. The signal indicates LF data modulation activity. In conjunction with suited
timers and counting stages in the microcontroller, it enables the software to precisely know the
progress of the LF data transmission. For further details, see
3-10 on page 14
The ATA5278 is equipped with an internal supply unit that provides supply and reference volt-
ages and currents. This unit is directly supplied by the VBATT pin. During power-down mode,
only the 5V voltage regulator is active. This regulator requires an external capacitor applied to
the VDD pin because during operations high peak currents may occur which must be buffered
by the external device. For further details on this issue, please refer to the section
Hints” on page
The Power-On-Reset (POR) is also generated in the internal supply section. The VDD voltage
level is monitored permanently and compared with the regular output level. As soon as the
actual level is lower than the POR threshold, V
30 µs.
The following
T1
CBOOST
VSHUNT
PGND1
PGND2
PGND3
DRV1
QSC
VDS
Figure 3-16
D1
22.
in the section
AGND
zero crossing
Current and
sensing
CINT
converter
HS driver
LS driver
control
Boost
L1
sketches an application using the ATA5278.
C2
“LF Data Modulation” on page
DGND
ATA5278
VBATT
Driver control
regulator
SCANE
logic
5-V
VDD
C1
TEST
OSCI OSCO
C3
POR
Oscillator
Control
register
status
and
X1
, a reset is triggered and held for at least
LF data buffer
VIF
NRES
Figure 3-9 on page 14
13.
interface
Voltage
SPI
MODACTIVE
CLKO
Microcontroller supply
S_CS
S_DI
S_DO
S_CLK
4832C–RKE–02/06
“Application
and
P_IN1
P_IN2
S_CLK
N_RES
S_CS
S_DI
S_DO
VDD
µC
Figure

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