S-1323 SII [Seiko Instruments Inc], S-1323 Datasheet - Page 14

• Manufacturer Part Number: S-1323
• Description: HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR
• Manufacturer: SII [Seiko Instruments Inc]

14
HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR
S-1323 Series
Precautions
• Wiring patterns for the VIN, VOUT and GND pins should be designed so that the impedance is low.
• Note that the output voltage may increase when a series regulator is used at low load current (1.0 mA or
• Generally a series regulator may cause oscillation, depending on the selection of external parts. The
• The voltage regulator may oscillate when the impedance of the power supply is high and the input
• The application conditions for the input voltage, output voltage, and load current should not exceed the
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
• In determining the output current, attention should be paid to the output current value specified in Table
• SII claims no responsibility for any disputes arising out of or in connection with any infringement by
When mounting an output capacitor between the VOUT and VSS pins (C
the input between VIN and VSS pins (C
short as possible.
less).
following conditions are recommended for this IC. However, be sure to perform sufficient evaluation
under the actual usage conditions for selection, including evaluation of temperature characteristics.
capacitor is small or an input capacitor is not connected.
package power dissipation.
electrostatic protection circuit.
5 in the electrical characteristics and footnote *5 of the table.
products including this IC of patents owned by a third party.
Input capacitor (C
Output capacitor (C
Equivalent series resistance (ESR): 10 Ω or less
IN
):
L
):
IN
Seiko Instruments Inc.
), the distance from the capacitors to these pins should be as
1.0 µF or more
1.0 µF or more
L
) and a capacitor for stabilizing
Rev.4.2
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