LMS8117ADT-1.8 NSC [National Semiconductor], LMS8117ADT-1.8 Datasheet - Page 7

• Manufacturer Part Number: LMS8117ADT-1.8
• Description: 1A Low-Dropout Linear Regulator
• Manufacturer: NSC [National Semiconductor]

Application Note
1.0 EXTERNAL CAPACITORS/STABILITY
1.1 Input Bypass Capacitor
An input capacitor is recommended. A 10µF tantalum on the
input is a suitable input bypassing for almost all applications.
1.2 Adjust Terminal Bypass Capacitor
The adjust terminal can be bypassed to ground with a by-
pass capacitor (C
pass capacitor prevents ripple from being amplified as the
output voltage is increased. At any ripple frequency, the
impedance of the C
ripple from being amplified:
The R1 is the resistor between the output and the adjust pin.
Its value is normally in the range of 100-200Ω. For example,
with R1 = 124Ω and f
11µF.
1.3 Output Capacitor
The output capacitor is critical in maintaining regulator sta-
bility, and must meet the required conditions for both mini-
mum amount of capacitance and ESR (Equivalent Series
Resistance). The minimum output capacitance required by
the LMS8117A is 10µF, if a tantalum capacitor is used. Any
increase of the output capacitance will merely improve the
loop stability and transient response. The ESR of the output
capacitor should be greater than 0.5Ω and less than 5Ω. In
the case of the adjustable regulator, when the C
a larger output capacitance (22µf tantalum) is required.
2.0 OUTPUT VOLTAGE
The LMS8117A adjustable version develops a 1.25V refer-
ence voltage, V
minal. As shown in Figure 1 , this voltage is applied across
resistor R1 to generate a constant current I1. The current
I
output. But since it is very small (60µA) compared with the I1
and very constant with line and load changes, the error can
be ignored. The constant current I1 then flows through the
output set resistor R2 and sets the output voltage to the
desired level.
For fixed voltage devices, R1 and R2 are integrated inside
the devices.
For fixed voltage devices, R1 and R2 are integrated inside
the devices.
ADJ
1/(2π*f
from the adjust terminal could introduce error to the
RIPPLE
*C
REF
ADJ
ADJ
ADJ
, between the output and the adjust ter-
)
RIPPLE
) to improve ripple rejection. This by-
<
should be less than R1 to prevent the
R1
= 120Hz, the C
ADJ
should be
ADJ
is used,
>
7
3.0 LOAD REGULATION
The LMS8117A regulates the voltage that appears between
its output and ground pins, or between its output and adjust
pins. In some cases, line resistances can introduce errors to
the voltage across the load. To obtain the best load regula-
tion, a few precautions are needed.
Figure 2, shows a typical application using a fixed output
regulator. The Rt1 and Rt2 are the line resistances. It is
obvious that the V
the voltage drops along the line resistances. In this case, the
load regulation seen at the R
the data sheet specification. To improve this, the load should
be tied directly to the output terminal on the positive side and
directly tied to the ground terminal on the negative side.
FIGURE 2. Typical Application using Fixed Output
FIGURE 1. Basic Adjustable Regulator
LOAD
is less than the V
Regulator
LOAD
would be degraded from
OUT
by the sum of
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