AK5380VT AKM [Asahi Kasei Microsystems], AK5380VT Datasheet - Page 8

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AK5380VT

Manufacturer Part Number
AK5380VT
Description
96kHz 24Bit ADC with Single - ended Input
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheets

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ASAHI KASEI
(Ta=-40 85 C; VA=4.5 5.5V; VD=2.7 5.5V; C
Notes:
MS0100-E-01
Parameter
Control Clock Frequency
Serial Interface Timing
Power-Down & Reset Timing
12. Refer to the operating overview section “Serial Data Interface”.
13. SCLK rising edge must not occur at the same time as LRCK edge.
14. In case of MSB justified format.
15. These cycles are the number of LRCK rising from PDN rising.
Master Clock 256fs:
SCLK Frequency
LRCK Frequency
SCLK Period
SCLK Pulse Width Low
LRCK Edge to SCLK “ ”
SCLK “ ” to LRCK Edge
LRCK Edge to SDTO Valid
SCLK “ ” to SDTO Valid
PDN Pulse Width
PDN “ ” to SDTO delay
Pulse Width High
384fs:
512fs:
768fs:
Pulse Width Low
Pulse Width High
Pulse Width Low
Pulse Width High
Pulse Width Low
Pulse Width High
Pulse Width Low
Pulse Width High
SWITCHING CHARACTERISTICS (fs=4kHz 48kHz)
(Note 12)
(Note 13)
(Note 13)
(Note 14)
(Note 15)
L
=20pF)
fCLK
tCLKL
tCLKH
fCLK
tCLKL
tCLKH
fCLK
tCLKL
tCLKH
fCLK
tCLKL
tCLKH
fSLK
fs
tSLK
tSLKL
tSLKH
tLRSH
tSHLR
tDLR
tDSS
tPDW
tPDV
Symbol
- 8 -
1.024
1.536
2.048
3.072
min
160
150
11
11
32
32
21
21
16
16
4
65
65
30
30
4129
typ
12.288
18.432
24.576
36.864
max
6.144
35
35
48
[AK5380]
Units
MHz
MHz
MHz
MHz
MHz
kHz
1/fs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2001/7

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