AK4396VF AKM [Asahi Kasei Microsystems], AK4396VF Datasheet - Page 28

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AK4396VF

Manufacturer Part Number
AK4396VF
Description
Advanced Multi-Bit 192kHz 24-Bit ?? DAC
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet

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Addr Register Name
00H Control 1
ASAHI KASEI
Notes:
RSTN: Internal timing reset
DIF2-0: Audio data interface modes (see Table 11)
ACKS: Master Clock Frequency Auto Setting Mode Enable (PCM only)
MS0336-E-00
Register Map
Register Definitions
For addresses from 05H to 1FH, data must not be written.
When PDN pin goes to “L”, the registers are initialized to their default values.
When RSTN bit goes to “0”, the only internal timing is reset and the registers are not initialized to their default values.
When the state of P/S pin is changed, the AK4396 should be reset by PDN pin.
Addr
00H
01H
02H
03H
04H
0 : Reset. All registers are not initialized.
1 : Normal Operation (Default)
0 : Disable : Manual setting mode (Default)
1 : Enable : Auto setting mode
Register Name
Control 1
Control 2
Control 3
Lch ATT
Rch ATT
Default
When the states of DFS1-0 bits change, the AK4396 should be reset by PDN pin or RSTN bit.
Initial value is “010” (Mode 2: 24bit MSB justified).
When ACKS bit = “1”, MCLK frequency and the sampling frequency are detected automatically.
ACKS
DZFE
ATT7
ATT7
D/P
D7
ACKS
D7
0
DSDM
DZFM
ATT6
ATT6
D6
0
D6
0
0
SLOW
DCKS
ATT5
ATT5
D5
0
- 28 -
D5
0
0
DCKB
ATT4
ATT4
DFS1
D4
0
D4
0
0
ATT3
ATT3
DFS0
DIF2
D3
0
DIF2
D3
0
DEM1
DZFB
ATT2
ATT2
DIF1
D2
DIF1
D2
1
DEM0
ATT1
ATT1
DIF0
D1
0
DIF0
D1
0
SMUTE
RSTN
ATT0
ATT0
[AK4396]
D0
0
2004/08
RSTN
D0
1

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