WM8985_07 WOLFSON [Wolfson Microelectronics plc], WM8985_07 Datasheet - Page 17
WM8985_07
Manufacturer Part Number
WM8985_07
Description
Multimedia CODEC With Class D Headphone and Line Out
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
1.WM8985_07.pdf
(118 pages)
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Pre-Production
SIGNAL TIMING REQUIREMENTS
SYSTEM CLOCK TIMING
Figure 2 System Clock Timing Requirements
Note:
1.
AUDIO INTERFACE TIMING – MASTER MODE
w
Test Conditions
DCVDD=1.8V, DBVDD=AVDD1=AVDD2=3.3V, DGND=AGND1=AGND2=0V, T
PARAMETER
System Clock Timing Information
MCLK cycle time
MCLK duty cycle
PLL pre-scaling and PLL N and K values should be set appropriately so that SYSCLK is no greater than 12.288MHz.
MCLK
Figure 3 Digital Audio Data Timing – Master Mode (see Control Interface)
SYMBOL
T
T
MCLKDS
MCLKY
t
MCLKL
t
MCLKY
MCLK=SYSCLK (=256fs)
t
MCLK input to PLL
MCLKH
CONDITIONS
Note 1
A
= +25
81.38
60:40
MIN
20
o
C, Slave Mode
TYP
PP, Rev 3.5, January 2007
40:60
MAX
WM8985
UNIT
ns
ns
17
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