WM8768_10 WOLFSON [Wolfson Microelectronics plc], WM8768_10 Datasheet - Page 30

• Manufacturer Part Number: WM8768_10
• Description: 24-bit, 192kHz 8-Channel DAC
• Manufacturer: WOLFSON [Wolfson Microelectronics plc]

WM8768
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MASTER MODE SELECT
Control bit MS selects between audio interface Master and Slave Modes. In Master mode LRCLK
and BCLK are outputs and are generated by the WM8768. In Slave mode LRCLK and BCLK are
inputs to WM8768.
MASTER MODE LRCLK FREQUENCY SELECT
In Master mode the WM8768 generates LRC and BCLK. These clocks are derived from the master
clock and the ratio of MCLK to LRCK is set by RATE.
MUTE PIN DECODE
The MUTE pin can either be used as an output or an input. When used as an input the MUTE pins
action can be controlled by setting the DZFM and DZFM4 bit to select the corresponding DAC for
applying the MUTE to. As an output its meaning is selected by the DZFM and DZFM4 control bits. By
default selecting the MUTE pin to represent if DAC1 has received more than 1024 midrail samples
will cause the MUTE pin to assert a softmute on DAC1. Disabling the decode block will cause any
logical high on the MUTE pin to apply a softmute to all DAC’s. For compatibility with the WM8772
register the MUTE pin decode bit is also found in the ADC control register, which is redundant on this
chip. The OR of these two register bit is taken internally.
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
Interface Control
Interface Control
DAC4 control
ADC Control
0001010
0001010
0001100
0001111
BIT
BIT
8:6
BIT
5
6
5
RATE[2:0]
LABEL
LABEL
LABEL
MPD
MPD
MS
DEFAULT
DEFAULT
DEFAULT
010
0
0
0
Audio Interface Master/Slave Mode
select:
MUTE pin decode disable:
MUTE pin decode disable:
Master Mode MCLK: LRCLK ratio
select:
0: Slave Mode
1: Master Mode
0: MUTE pin decode enable
1: MUTE pin decode disable
0: MUTE pin decode enable
1: MUTE pin decode disable
000: 128fs
001: 192fs
010: 256fs
011: 384fs
100: 512fs
101: 768fs
DESCRIPTION
DESCRIPTION
DESCRIPTION
PD Rev 4.3 July 2010
Production Data
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