WM8770SIFT WOLFSON [Wolfson Microelectronics plc], WM8770SIFT Datasheet

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WM8770SIFT

Manufacturer Part Number
WM8770SIFT
Description
24-bit, 192kHz 8-Channel Codec with Volume Control
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet

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DESCRIPTION
The WM8770 is a high performance, multi-channel audio
codec. The WM8770 is ideal for surround sound processing
applications for home hi-fi, automotive and other audio
visual equipment.
A stereo 24-bit multi-bit sigma delta ADC is used with an
eight stereo channel input selector. Each channel has
analogue domain mute and programmable gain control.
Digital audio output word lengths from 16-32 bits and
sampling rates from 8kHz to 96kHz are supported.
Four stereo 24-bit multi-bit sigma delta DACs are used with
oversampling digital interpolation filters. Digital audio input
word lengths from 16-32 bits and sampling rates from 8kHz
to 192kHz are supported. Each DAC channel has
independent analogue volume and mute control, with a set
of input multiplexors allowing selection of an external 3
channel stereo analogue input into these volume controls.
The audio data interface supports I
justified and DSP digital audio formats.
The device is controlled via a 3 wire serial interface. The
interface provides access to all features including channel
selection, volume controls, mutes, de-emphasis and power
management facilities. The device is available in a 64-lead
TQFP package.
BLOCK DIAGRAM
WOLFSON MICROELECTRONICS plc
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CCB is a trademark of SANYO ELECTRIC CO., LTD
24-bit, 192kHz 8-Channel Codec with Volume Control
AINOPR
AINOPL
AIN1R
AIN2R
AIN3R
AIN4R
AIN5R
AIN6R
AIN7R
AIN8R
AIN1L
AIN2L
AIN3L
AIN4L
AIN5L
AIN6L
AIN7L
AIN8L
RECR
RECL
MUTE
2
S, left justified, right
STEREO
ADC
at
http://www.wolfsonmicro.com/enews/
CCB is SANYO’s original bus format and all the bus addresses are controlled by SANYO.
CONTROL INTERFACE
AUDIO INTERFACE
DIGITAL FILTERS
AND
FEATURES
APPLICATIONS
STEREO
STEREO
STEREO
STEREO
Surround Sound AV Processors and Hi-Fi systems
Automotive Audio
Audio Performance
DAC Sampling Frequency: 8KHz – 192kHz
ADC Sampling Frequency: 8KHz – 96kHz
3-Wire SPI or CCB MPU Serial Control Interface
Master or Slave Clocking Mode
Programmable Audio Data Interface Modes
Four Independent stereo DAC outputs with independent
analogue and digital volume controls
Analogue Bypass Path Feature
Six channel selectable AUX input to the volume controls
Eight stereo ADC inputs with analogue gain adjust from
+19dB to –12dB in 1dB steps
2.7V to 5.5V Analogue, 2.7V to 3.6V Digital supply
Operation
5V tolerant digital inputs
DAC
DAC
DAC
DAC
106dB SNR (‘A’ weighted @ 48kHz) DAC
102dB SNR (‘A’ weighted @ 48kHz) ADC
I
16/20/24/32 bit Word Lengths
2
S, Left, Right Justified or DSP
Copyright
Production Data, June 2005, Rev 4.1
W
WM8770
2005 Wolfson Microelectronics plc
FILTERS
FILTERS
FILTERS
FILTERS
PASS
PASS
PASS
PASS
LOW
LOW
LOW
LOW
WM8770
VOUT1L
VOUT1R
VOUT2L
VOUT2R
VOUT3L
VOUT3R
VOUT4L
VOUT4R

Related parts for WM8770SIFT

WM8770SIFT Summary of contents

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Codec with Volume Control DESCRIPTION The WM8770 is a high performance, multi-channel audio codec. The WM8770 is ideal for surround sound processing applications for home hi-fi, automotive and other audio visual equipment. A stereo 24-bit multi-bit ...

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WM8770 DESCRIPTION .......................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 BLOCK DIAGRAM .................................................................................................1 TABLE OF CONTENTS .........................................................................................2 PIN CONFIGURATION...........................................................................................3 ORDERING INFORMATION ..................................................................................3 PIN DESCRIPTION ................................................................................................4 ABSOLUTE MAXIMUM RATINGS.........................................................................6 ELECTRICAL CHARACTERISTICS ......................................................................7 TERMINOLOGY .....................................................................................................8 MASTER CLOCK TIMING ............................................................................................. 9 DIGITAL AUDIO INTERFACE – MASTER MODE ...

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... AIN5L 9 10 AIN5R AIN6L 11 AIN6R 12 AIN7L 13 AIN7R 14 15 AIN8L AIN8R ORDERING INFORMATION TEMPERATURE DEVICE RANGE o WM8770SIFT DGND AGND2 47 46 VOUT4R 45 VOUT4L DACREFP2 44 43 VOUT3R GR2 42 41 VOUT3L VMIDDAC 40 ...

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WM8770 PIN DESCRIPTION PIN NAME 1 AIN1L Analogue Input 2 AIN1R Analogue Input 3 AIN2L Analogue Input 4 AIN2R Analogue Input 5 AIN3L Analogue Input 6 AIN3R Analogue Input 7 AIN4L Analogue Input 8 AIN4R Analogue Input 9 AIN5L Analogue ...

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Production Data PIN NAME 52 DOUT Digital output 53 DIN1 Digital Input 54 DIN2 Digital Input 55 DIN3 Digital Input 56 DIN4 Digital Input 57 DACLRC Digital input/output 58 ADCLRC Digital input/output 59 BCLK Digital input/output 60 MCLK Digital input ...

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WM8770 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics ...

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Production Data ELECTRICAL CHARACTERISTICS Test Conditions AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, T otherwise stated. PARAMETER Digital Logic Levels (TTL Levels) Input LOW level Input HIGH level Output LOW Output HIGH Analogue Reference Levels ...

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WM8770 Test Conditions AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, T otherwise stated. PARAMETER Analogue input (AIN) to Analogue output (VOUT) (Load=10kΩ, 50pF, gain = 0dB) Bypass Mode 0dB Full scale output voltage SNR (Note ...

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Production Data MASTER CLOCK TIMING MCLK Figure 1 Master Clock Timing Requirements Test Conditions AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, T otherwise stated. PARAMETER System Clock Timing Information MCLK System clock pulse width high ...

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WM8770 BCLK (Output) ADCLRC/ DACLRC (Outputs) DOUT DIN1/2/3/4 Figure 3 Digital Audio Data Timing – Master Mode Test Conditions AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, T otherwise stated. PARAMETER SYMBOL Audio Data Input Timing ...

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Production Data DIGITAL AUDIO INTERFACE – SLAVE MODE BCLK ADCLRC WM8770 DACLRC CODEC DOUT DIN1/2/3/4 4 Figure 4 Audio Interface – Slave Mode BCLK DACLRC/ ADCLRC DIN1/2/3/4 DOUT Figure 5 Digital Audio Data Timing – Slave Mode Test Conditions AVDD ...

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WM8770 MPU INTERFACE TIMING t t RCSU RCHO RESETB Figure 6 SPI Compatible Control Interface Input Timing Test Conditions AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, T otherwise stated. PARAMETER CE to ...

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Production Data t t RCES RCLH RESETB CE t SCH DSU DHO Figure 7 3 Wire CCB Compatible Interface Input Timing Information – CL Stopped Low t t RCES RCLH RESETB CE t SCH CL DI ...

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WM8770 INTERNAL POWER ON RESET CIRCUIT Figure 9 Internal Power On Reset Circuit Schematic The WM8770 includes an internal Power On Reset Circuit which is used to reset the digital logic into a default state after power up. Figure 9 ...

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Production Data Figure 10 Typical Power up sequence where DVDD is powered before AVDD. Figure 11 Typical Power up sequence where AVDD is powered before DVDD Typical POR Operation (typical values, not tested) SYMBOL V pora V porr V pora_off ...

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WM8770 In a real application the designer is unlikely to have control of the relative power up sequence of AVDD and DVDD. Using the POR circuit to monitor VMIDADC ensures a reasonable delay between applying power to the device and ...

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Production Data DEVICE DESCRIPTION INTRODUCTION WM8770 is a complete 8-channel DAC, 2-channel ADC audio codec, including digital interpolation and decimation filters, multi-bit sigma delta stereo ADC, and switched capacitor multi-bit sigma delta DACs with analogue volume controls on each channel ...

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WM8770 AUDIO DATA SAMPLING RATES In a typical digital audio system there is only one central clock source producing a reference clock to which all audio data processing is synchronised. This clock is often referred to as the audio system’s ...

Page 19

Production Data Table 8 shows the settings for ADCRATE and DACRATE for common sample rates and MCLK frequencies. SAMPLING RATE (DACLRC/ ADCLRC) 32kHz 44.1kHz 48kHz 96kHz 192kHz Table 8 Master Mode ADC/DACLRC Frequency Selection BCLK is also generated by the ...

Page 20

WM8770 POWERDOWN MODES The WM8770 has powerdown control bits allowing specific parts of the WM8770 to be powered off when not being used. The 8-channel input source selector and input buffer may be powered down using control bit AINPD. When ...

Page 21

Production Data In Master mode (MS=1) ADCLRC, DACLRC and BCLK are outputs from the WM8770 (Figure 13). ADCLRC, DACLRC and BITCLK are generated by the WM8770. DIN1/2/3/4 are sampled by the WM8770 on the rising edge of BCLK so the ...

Page 22

WM8770 LEFT JUSTIFIED MODE In left justified mode, the MSB of DIN1/2/3/4 is sampled by the WM8770 on the first rising edge of BCLK following a DACLRC transition. The MSB of the ADC data is output on DOUT and changes ...

Page 23

Production Data DSP EARLY MODE In DSP early mode, the MSB of DAC channel 1 left data is sampled by the WM8770 on the second rising edge on BCLK following a DACLRC rising edge. DAC channel 1 right and DAC ...

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WM8770 DSP LATE MODE In DSP late mode, the MSB of DAC channel 1 left data is sampled by the WM8770 on the first BCLK rising edge following a DACLRC rising edge. DAC channel 1 right and DAC channels 2, ...

Page 25

Production Data 3-WIRE (SPI COMPATIBLE) SERIAL CONTROL MODE DI is used for the program data used to clock in the program data and CE is used to latch the program data sampled on the rising edge ...

Page 26

WM8770 CONTROL INTERFACE REGISTERS DIGITAL AUDIO INTERFACE CONTROL REGISTER Interface format is selected via the FMT[1:0] register bits: REGISTER ADDRESS 10110 Interface Control In left justified, right justified or I ADCLRC/DACLRC. If this bit is set high, the expected polarity ...

Page 27

Production Data REGISTER ADDRESS 10111 Interface Control MASTER MODE ADCLRC/DACLRC FREQUENCY SELECT In Master mode the WM8770 generates ADCLRC, DACLRC and BCLK. These clocks are derived from master clock and the ratio of MCLK to ADCLRC and DACLRC are set ...

Page 28

WM8770 1.5 1 0.5 0 -0.5 -1 -1.5 -2 -2.5 0 Figure 24 Application and Release of Soft Mute Figure 24 shows the application and release of MUTE whilst a full amplitude sinusoid is being played at 48kHz sampling rate. ...

Page 29

Production Data DE-EMPHASIS MODE A digital De-emphasis filter may be applied to each DAC channel. The De-emphasis filter for each stereo channel is enabled under the control of DEEMP[3:0]. DEEMP[0] enables the de-emphasis filter for channel 1, DEEMP[1] enables the ...

Page 30

WM8770 INFINITE ZERO DETECT ENABLE Setting the IZD register bit will enable the internal infinite zero detect function: REGISTER ADDRESS 10011 DAC Channel Control With IZD enabled, applying 1024 consecutive zero input samples to all 8 DAC channels will cause ...

Page 31

Production Data DAC ANALOGUE VOLUME CONTROL The DAC volume may be adjusted independently in both the analogue and digital domain using separate volume control registers. REGISTER BIT LABEL ADDRESS 00000 6:0 L1A[6:0] Analogue Attenuation 7 L1ZCEN DACL1 8 UPDATE 00001 ...

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WM8770 REGISTER BIT LABEL ADDRESS 00110 6:0 L4A[6:0] Analogue Attenuation 7 L4ZCEN DACL4 8 UPDATE 00111 6:0 R4A[6:0] Analogue Attenuation 7 R4ZCEN DACR4 8 UPDATE 01000 6:0 MASTA[6:0] Master Analogue 7 MZCEN Attenuation (all channels) 8 UPDATE Table 10 Attenuation ...

Page 33

Production Data DAC ANALOGUE OUTPUT ATTENUATION Register bits L1A and R1A control the left and right channel attenuation of DAC 1. Register bits L2A and R2A control the left and right channel attenuation of DAC 2. Register bits L3A and ...

Page 34

WM8770 REGISTER BIT LABEL ADDRESS 01111 7:0 LDA4[7:0] Digital Attenuation 8 UPDATE DACL4 10000 7:0 RDA4[7:0] Digital Attenuation 8 UPDATE DACR4 10001 7:0 MASTDA[7:0] Master Digital 8 UPDATE Attenuation (all channels) L/RDAX[7:0] Table 12 Digital Volume Control Attenuation Levels The ...

Page 35

Production Data DAC OUTPUT PHASE The DAC Phase control word determines whether the output of each DAC is non-inverted or inverted REGISTER ADDRESS 10010 DAC Phase ADC GAIN CONTROL Control bits LAG[4:0] and RAG[4:0] control the ADC input gain, allowing ...

Page 36

WM8770 ADC HIGHPASS FILTER DISABLE The ADC digital filters contain a digital highpass filter. This defaults to enabled and can be disabled using software control bit ADCHPD. REGISTER ADDRESS 10110 ADC control ADC INPUT MUX AND POWERDOWN CONTROL REGISTER ADDRESS ...

Page 37

Production Data REGISTER ADDRESS 11100 Output Mux and Powerdown Control 11101 Output Mux and Powerdown Control MX1/2/3[2:0] selects the output for VOUT1/2/3. DAC AUX BYPASS Figure 25 MX1/2/3[2:0] Output Select MX4[1:0] selects the output for VOUT4L/R. DAC4 BYPASS Figure 26 ...

Page 38

WM8770 REGISTER MAP The complete register map is shown below. The detailed description can be found in the relevant text of the device description. The WM8770 can be configured using the Control Interface. All unused bits should be set to ...

Page 39

Production Data REGISTER BIT LABEL ADDRESS 00000 6:0 L1A[6:0] Analogue Attenuation 7 L1ZCEN DACL1 8 UPDATE 00001 6:0 R1A[6:0] Analogue Attenuation 7 R1ZCEN DACR1 8 UPDATE 00010 6:0 L2A[6:0] Analogue Attenuation 7 L2ZCEN DACL2 8 UPDATE 00011 6:0 R2A[6:0] Analogue ...

Page 40

WM8770 REGISTER BIT LABEL ADDRESS 00110 6:0 L4A[6:0] Analogue Attenuation 7 L4ZCEN DACL4 8 UPDATE 00111 6:0 R4A[6:0] Analogue Attenuation 7 R4ZCEN DACR4 8 UPDATE 01000 6:0 MASTA[6:0] Analogue Master 7 MZCEN Attenuation (all channels) 8 UPDATE 01001 7:0 LDA1[7:0] ...

Page 41

Production Data REGISTER BIT LABEL ADDRESS 01110 7:0 RDA3[7:0] Digital Attenuation 8 UPDATE DACR3 01111 7:0 LDA4[7:0] Digital Attenuation 8 UPDATE DACL4 10000 7:0 RDA4[7:0] Digital Attenuation 8 UPDATE DACR4 10001 7:0 MASTDA[7:0] Master Digital 8 UPDATE Attenuation (all channels) ...

Page 42

WM8770 REGISTER BIT LABEL ADDRESS 10100 3:0 DMUTE[3:0] Mute Control 4 MUTEALL 5 RECEN 10101 3:0 DEEMP[3:0] DAC Control 7:4 DZFM[3:0] 1:0 FMT[1:0] 10110 Interface Control 2 LRP 3 BCP 5:4 WL[1:0] 8 ADCHPD w DEFAULT DAC Channel Soft Mute ...

Page 43

Production Data REGISTER BIT LABEL ADDRESS 10111 2:0 ADCRATE[2:0] Master Mode Control 3 ADCOSR 6:4 DACRATE[2: 11000 0 PWDN Powerdown Control 1 ADCD 5:2 DACD[3:0] 11001 4:0 LAG[4:0] Attenuation ADCL 5 MUTE 6 LRBOTH 7 ADCMUTE 11010 4:0 ...

Page 44

WM8770 REGISTER BIT LABEL ADDRESS 11100 2:0 MX1[2:0] Output Mux 5:3 MX2[2:0] and 8:7 OUTPD[1:0] Powerdown Control 11101 2:0 MX3[2:0] Output Mux 4:3 MX4[1:0] and 8:7 OUTPD[3:2] Powerdown Control 11111 [8:0] RESET Software reset Table 15 Register Map Description w ...

Page 45

Production Data DIGITAL FILTER CHARACTERISTICS PARAMETER ADC Filter Passband Passband ripple Stopband Stopband Attenuation Group Delay DAC Filter Passband Passband ripple Stopband Stopband Attenuation Group Delay Table 16 Digital Filter Characteristics DAC FILTER RESPONSES 0 -20 -40 -60 -80 -100 ...

Page 46

WM8770 ADC FILTER RESPONSES 0 -20 -40 -60 -80 0 0.5 1 1.5 Frequency (Fs) Figure 31 ADC Digital Filter Frequency Response ADC HIGH PASS FILTER The WM8770 has a selectable digital highpass filter to remove DC offsets. The filter ...

Page 47

Production Data DIGITAL DE-EMPHASIS CHARACTERISTICS - Frequency (kHz) Figure 34 De-Emphasis Frequency Response (32kHz - Frequency (kHz) Figure 36 De-Emphasis Frequency Response ...

Page 48

WM8770 APPLICATIONS INFORMATION RECOMMENDED EXTERNAL COMPONENTS w Production Data PD Rev 4.1 June 2005 48 ...

Page 49

Production Data EXTERNAL CIRCUIT CONFIGURATION In order to allow the use of 2V rms and larger inputs to the ADC and AUX inputs, a structure is used that uses external resistors to drop these larger voltages. This also increases the ...

Page 50

WM8770 It is recommended that a lowpass filter be applied to the output from each DAC channel for Hi Fi applications. Typically a second order filter is suitable and provides sufficient attenuation of high frequency components (the unique low order, ...

Page 51

Production Data PACKAGE DIMENSIONS FT: 64 PIN TQFP ( 1.0 mm ccc C -C- SEATING PLANE Dimensions Symbols (mm) MIN NOM A ----- ----- A 0.05 ----- 1 A 0.95 ...

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