M24L28256DA-55BEG ESMT [Elite Semiconductor Memory Technology Inc.], M24L28256DA-55BEG Datasheet

M24L28256DA-55BEG

Manufacturer Part Number

M24L28256DA-55BEG

Description

2-Mbit (256K x 8) Pseudo Static RAM

Manufacturer

ESMT [Elite Semiconductor Memory Technology Inc.]

Datasheet

1.M24L28256DA-55BEG.pdf (10 pages)

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ESMT

PSRAM

Features

•Advanced low-power architecture

•High speed: 55 ns, 70 ns

•Wide voltage range: 2.7V to 3.3V

•Typical active current: 1 mA @ f = 1 MHz

•Low standby power

•Automatic power-down when deselected

Functional Description

The M24L28256DA is a high-performance CMOS pseudo

static RAM (PSRAM) organized as 256K words by 8 bits.

Easy memory expansion is provided by an active LOW Chip

Enable( CE

LOW Output Enable ( OE ).This device has an automatic

power-down feature that reduces power consumption

dramatically when deselected. Writing to the device is

accomplished by asserting Chip Enable One ( CE

Logic Block Diagram

Elite Semiconductor Memory Technology Inc.

) and active HIGH Chip Enable ( CE

),and active

) and Write

Enable ( WE ) inputs LOW and Chip Enable Two ( CE

HIGH. Data on the eight I/O pins (I/O

written into the location specified on the address pins (A

through A

Reading from the device is accomplished by asserting the

Chip Enable One ( CE

LOW while forcing Write Enable ( WE ) HIGH. And Chip

Enable Two ( CE

contents of the memory location specified by the address pins

will appear on the I/O pins.

The eight input/output pins (I/O

high-impedance state when the device is deselected ( CE

HIGH or CE

during write operation ( CE

LOW). See the Truth Table for a complete description of read

and write modes.

LOW), the outputs are disabled ( OE HIGH), or

2-Mbit (256K x 8)

Pseudo Static RAM

) HIGH. Under these conditions, the

Revision : 1.0

) and Output Enable ( OE ) inputs

Publication Date : Jul. 2007

M24L28256DA

LOW, CE

through I/O

HIGH, and WE

) are placed in a

) is then

1/10

) input

Related parts for M24L28256DA-55BEG

M24L28256DA-55BEG Summary of contents

Page 1

... MHz •Low standby power •Automatic power-down when deselected Functional Description The M24L28256DA is a high-performance CMOS pseudo static RAM (PSRAM) organized as 256K words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable and active HIGH Chip Enable ( CE 1 LOW Output Enable ( OE ) ...

Page 2

... Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V and T = 25°C. A Elite Semiconductor Memory Technology Inc. VFBGA Top View Operating I Speed(ns 1MHz Max. Typ.[2] Max M24L28256DA Power Dissipation (mA) CC Standby MAX Typ.[2] Max. Typ. [ Publication Date : Jul. 2007 Revision : 1.0 (µ ...

Page 3

... 3.3V CC Test Conditions TA = 25° MHz CC(typ) Test conditions follow standard test methods and procedures for measuring thermal impedance, per EIA/ JESD51. M24L28256DA Ambient Range Temperature ( −25°C to +85°C -55 Typ. Min. Max. Min. [2] 2.7 3.0 3.3 2 ...

Page 4

... Elite Semiconductor Memory Technology Inc. 3. 22000 22000 11000 1.50 Description HIGH to Data Valid 2 HIGH to LOW Z[ LOW to HIGH HIGH to Write End 2 /I and 30-pF load capacitance OL OH M24L28256DA Unit Ω Ω Ω V -55 -70 Min. Max. Min. Max. 55[11 ...

Page 5

... ESMT Switching Waveforms Read Cycle 1 (Address Transition Controlled)[11, 12, 13] Read Cycle Controlled) [11, 13] Notes: 12. Device is continuously selected 13 HIGH for Read Cycle. Elite Semiconductor Memory Technology Inc. =V and M24L28256DA Publication Date : Jul. 2007 Revision : 1.0 5/10 ...

Page 6

... If Chip Enables go INACTIVE simultaneously with WE =HIGH, the output remains in a high-impedance state. 16.During the DON’T CARE period in the DATA I/O waveform, the I/Os are in output state and input signals should not be applied. Elite Semiconductor Memory Technology Inc M24L28256DA Publication Date : Jul. 2007 Revision : 1.0 6/10 ...

Page 7

... Ordering Information Speed (ns) Ordering Code 55 M24L28256DA-55BEG 70 M24L28256DA-70BEG Note: 17.H = Logic HIGH Logic LOW Don’t Care. Elite Semiconductor Memory Technology Inc. I/O -I High Z X High Z H Data Out L Data In H High Z Package Type ...

Page 8

... ESMT Package Diagrams Elite Semiconductor Memory Technology Inc. 36-Lead VFBGA ( mm) M24L28256DA Publication Date : Jul. 2007 Revision : 1.0 8/10 ...

Page 9

... ESMT Revision History Revision 1.0 Elite Semiconductor Memory Technology Inc. Date Original 2007.07.19 M24L28256DA Description Publication Date : Jul. 2007 Revision : 1.0 9/10 ...

Page 10

... If products described here are to be used for such kinds of application, purchaser must do its own quality assurance testing appropriate to such applications. Elite Semiconductor Memory Technology Inc. Important Notice M24L28256DA Publication Date : Jul. 2007 Revision : 1.0 10/10 ...

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