RT8253A RICHTEK [Richtek Technology Corporation], RT8253A Datasheet - Page 13

• Manufacturer Part Number: RT8253A
• Description: 3A, 23V, 340kHz Synchronous Step-Down Converter
• Manufacturer: RICHTEK [Richtek Technology Corporation]

where
The goal of the compensation network is to provide
adequate phase margin (usually greater than 45 degrees)
and the highest bandwidth (0dB crossing frequency). It is
also recommended to manipulate loop frequency response
that its gain crosses over 0dB at a slope of -20dB/dec.
According to Figure 5, the compensation network
frequency is shown as below :
Determining the 0dB crossing frequency (f
bandwidth) is the first step of compensator design. Usually,
f
second step is to calculate the open loop modulator gain
and find out the gain loss at f
a compensator gain that can compensate the modulator
gain loss at f
make loop have sufficient phase margin.
f
modulator. f
(typically, 0.5 to 1 times switching frequency) to eliminate
high frequency noise.
DS8253A-02 March 2011
ω
Q
f
f
fz
C
Z
P1
P2
0
n
p
Figure 6. Typical Bode Plot of a Current Mode Buck
is set to 0.1 to 0.5 times switching frequency. The
is designed to cancel the low frequency pole of
=
=
=
=
=
2
T
0
Pole generated
by F
Π
2
Π
Π
S
Π
x m x (1 D) 0.5
x C x R
P
Zero generated by
Compensation
network, f
x R x
(s)
[
1
P2
C
c
C
C
is usually placed below switching frequency
. The final step is to design f
1
⎛
⎜
⎝
Z
1
C
C
C xC
−
P
P
+
Zero generated by
ESR and COUT of
F
C
P
−
Converter
C
(s)
C
Pole generated by
Compensation
network, f
⎞
⎟
⎠
]
C
. The third step is to design
P2
f
C
Double pole
generated by F
Loop Gain
C
Compensation Gain
, control loop
Z
Modulation Gain
and f
Frequency (Hz)
P2
h
(s)
to
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
P
where T
the ambient temperature, and θ
thermal resistance.
For recommended operating condition specifications of
the RT8253A, the maximum junction temperature is 125°C
and T
thermal resistance, θ
SOP-8 (Exposed Pad) packages, the thermal resistance,
θ
thermal test board. The maximum power dissipation at
T
P
SOP-8 (Exposed Pad) package
The maximum power dissipation depends on the operating
ambient temperature for fixed T
resistance, θ
curve in Figure 7 allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
JA
A
D(MAX)
D(MAX)
= 25°C can be calculated by the following formula :
, is 75°C/W on a standard JEDEC 51-7 single layer
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
Figure 7. Derating Curve for RT8253A Package
A
is the ambient temperature. The junction to ambient
0
= (T
J(MAX)
= (125°C − 25°C) / (75°C/W) = 1.333W for
J(MAX)
JA
is the maximum junction temperature, T
. For the RT8253A package, the derating
25
− T
Ambient Temperature (°C)
A
) / θ
JA
50
JA
, is layout dependent. For
JA
is the junction to ambient
75
RT8253A
J(MAX)
Four-Layer PCB
www.richtek.com
100
and thermal
125
A
13
is