RT9203 RICHTEK [Richtek Technology Corporation], RT9203 Datasheet - Page 13

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RT9203

Manufacturer Part Number
RT9203
Description
Dual Regulators - Synchronous Buck PWM DC-DC and Linear Controller
Manufacturer
RICHTEK [Richtek Technology Corporation]
Datasheet

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Input / Output Capacitor
High frequency/long life decoupling capacitors should be
placed as close to the power pins of the load as physically
possible. Be careful not to add inductance to the PCB
trace, as it could eliminate the performance from utilizing
these low inductance components. Consult with the
manuf acturer of the load on specific decoupling
requirements.
The output capacitors are necessary for filtering output
and stabilizing the close loop (see the PWM loop stability).
For powering advanced high-speed processors, it is
required to meet fast load transient requirement. Also high
ESR usually induces ripple that may trigger UV or OV
protections. So High frequency capacitors with low ESR/
ESL capacitors are recommended here.
Linear Regulator Driver
The linear controller of RT9203/A was designed to drive an
external bipolar NPN transistor or a MOSFET. For a
MOSFET, normally DRV need to provide minimum
V
voltage. When driving MOSFET operating at a 5V power
supply, the gate-drive will be limited at 5V. At this situation,
as shown in Figure 7, a MOSFET with low VT threshold
(VT = 1V) and set Vout2 below 2.5V are suggested. In
V
is regulated higher than 6V, which providing higher gate-
drive capability for driving the MOSFET, V
as V
DS9203/A-10 March 2007
V
OUT2
BOOT
CC
OUT2
= 5V
+VT+gate-drive voltage to keep V
= 12V operation condition, as Figure 8. shown, VCC
3.3V.
BOOT
VCC
RT9203/A
DRV
Max. 5V
Figure 7
FBL
R3
R4
Suggest Low
V
R4<1K
T
MOSFET
OUT2
OUT2
V
OUT2
as the set
can be set
< 2.5V
Preliminary
40
30
20
10
PWM Loop Stability
The RT9203/A is a voltage mode buck controller designed
for 5V step-down applications. The gain of error amplifier
is fixed at 35dB for simplifying design.
The output amplitude of ramp oscillator is 1.6V, the loop
gain and loop pole/zero are calculated as follows:
The RT9203/A Bode plot is as shown in Figure 9. It is
stable in most of application conditions.
DC loop gain G = 35dB
LC filter pole P =
Error Amp pole P = 300kHz
ESR zero Z =
V
BOOT
V
C
L = 2 H
V
V
V
OUT
OUT
OUT
OUT
OUT
100
= 12V
= 3.3V
= 1500 F(33m )
= 1.5V
= 2.5V
= 3.3V
6V
O
O
A
2 ESR C
BOOT
VCC
1k
A
RT9203/A
2
P
DRV
O
1
Loop
Gain
1
= 2.9kHz
LC
Max. 6V
Figure 9
Figure 8
FBL
1.75
Z
5
10k
O
= 3.2kHz
R3
R4
V
0.8
RT9203/A
OUT
Suggest Low
V
R4<1K
T
MOSFET
100k
www.richtek.com
V
OUT2
< 3.3V
1M
13

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