RT9379 RICHTEK [Richtek Technology Corporation], RT9379 Datasheet - Page 8

• Manufacturer Part Number: RT9379
• Description: 6 Channels 150mA x1/x1.5/x2 Charge Pump White LED Driver
• Manufacturer: RICHTEK [Richtek Technology Corporation]

RT9379
the RT9379, The maximum junction temperature is 125°C.
The junction to ambient thermal resistance θ
dependent. For WQFN-16L 2x3 package, the thermal
resistance θ
four layers thermal test board. The maximum power
dissipation at T
formula :
P
WQFN-16L 2x3 package
The maximum power dissipation depends on operating
ambient temperature for fixed T
resistance θ
derating curve allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation allowed.
Layout Considerations
For best performance of the RT9379, the following layout
guidelines should be strictly followed :
www.richtek.com
8
D(MAX)
Output Capacitor (C
and connected to ground plane to reduce noise coupling
from charge pump to LEDs.
All the traces of LED pins running from chip to LED's
should be wide and short to reduce the parasitic
connection resistance.
The trace from CF pin to external capacitance should
be as short as possible.
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
Figure 1. Derating Curve for RT9379 Package
0
= (125°C − 25°C) / (90°C/W) = 1.111W for
JA
JA
. For RT9379 package, the Figure 1 of
is 90°C/W on the standard JEDEC 51-7
A
25
= 25°C can be calculated by following
Ambient Temperature (°C)
OUT
) should be placed close to VOUT
50
WQFN-16L 2x3
75
J(MAX)
Four Layers PCB
and thermal
100
JA
is layout
125
Output capacitor
(C
be placed close
to VOUT and
connected to
ground plane to
reduce noise
coupling from
charge pump to
LEDs.
OUT
Input capacitor (C
connected to ground plane. The trace of VIN in the PCB
should be placed far away from the sensitive devices or
shielded by the ground.
The traces running from pins to flying capacitor should
be short and wide to reduce parasitic resistance and
prevent noise radiation.
) should
All the traces of LED pins running from
chip to LEDs should be wide and short to
reduce the parasitic connection resistance.
The traces running from pins to flying capacitor
should be short and wide to reduce parasitic
resistance and prevent noise radiation.
Figure 2. PCB Layout Guide
PGND
VOUT
LED4
LED5
LED6
GND
IN
1
2
3
4
5
) should be placed close to VIN and
16
6
GND
15
7
17
14
8
13
12
11
10
9
DS9379-01 April 2011
AGND
CF
VIN
EN
C2P
GND
The trace from CF pin
to external capacitance
should be as short as
possible.
Battery
Input capacitor
(C
placed close to VIN
and connected to
ground plane. The
trace of VIN in the
PCB should be
placed far away
from the sensitive
devices or shielded
by the ground.
IN
) should be