RT9824 RICHTEK [Richtek Technology Corporation], RT9824 Datasheet - Page 7

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RT9824

Manufacturer Part Number
RT9824
Description
Smart Multi-Voltage Detector
Manufacturer
RICHTEK [Richtek Technology Corporation]
Datasheet
Application Information
The RT9824 smart voltage detector monitors three voltage
levels at the same time to ensure the micro-processor is
operated within the recommended input voltage range. In
conventional reset IC application, to monitor one power
rail needs one reset IC. The RT9824 can monitor three
power rails simultaneously, by using just one reset IC.
The RT9824 also provides a Manual Reset (MR) function
for application easily. Glitch-rejection is implemented in
the RT9824 to prevent it from false operation and to
eliminate the additional de-bouncing circuitry.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
P
Where T
temperature, T
the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT9824, the maximum junction temperature is 125°C and
T
ambient thermal resistance θ
TSOT-23-8 package, the thermal resistance θ
250°C/W on the standard JEDEC 51-3 single layer thermal
test board. The maximum power dissipation at T
can be calculated by following formula :
P
TSOT-23-8 package
The maximum power dissipation depends on operating
ambient temperature for fixed T
resistance θ
derating curve allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation allowed.
DS9824-01 April 2011
A
D(MAX)
D(MAX)
is the maximum ambient temperature. The junction to
= (T
= (125°C − 25°C) / (230°C/W) = 0.435W for
J(MAX)
J(MAX)
JA
. For RT9824 package, the Figure 1 of
A
is the ambient temperature and the θ
is the maximum operation junction
− T
A
) / θ
JA
JA
is layout dependent. For
J(MAX)
and thermal
A
= 25°C
JA
JA
is
is
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
Figure 1. Derating Curves for RT9824 Package
0
25
Ambient Temperature (°C)
50
TSOT-23-8
75
Single Layer PCB
RT9824
www.richtek.com
100
125
7

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