HN58W241000FPIE RENESAS [Renesas Technology Corp], HN58W241000FPIE Datasheet - Page 7

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HN58W241000FPIE

Manufacturer Part Number
HN58W241000FPIE
Description
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
HN58W241000I
Device Address (A1, A2)
Up to four devices can be addressed on the same bus by setting the levels on these pins to different combinations. The
levels on these pins are compared with the device address code which are inputted thought the SDA pin. These
device is selected if the compare is successfully done. These pins are internally pulled down to V
these pins as low if unconnected.
Pin Connections for A1, A2
1M bit
Note:
Write Protect (WP)
When the Write Protect pin (WP) is high, the write protection feature is enabled and operates as shown in the following
table. When the WP is low, write operation for all memory arrays are allowed. The read operation is always
activated irrespective of the WP pin status. When left unconnected, the WP input is read as V
internally pulled down to V
Write Protect Area
V
V
Memory size Max connect number
Rev.3.00,
IH
IL
1. “V
if left unconnected.
CC
Jul.12.2005,
WP pin status
/V
4
SS
” means that device address pin should be connected to V
SS
page 7 of 18
.
V
CC
/V
Full (1M bit)
Normal read/write operation
SS
A2
Pin connection
V
CC
/V
SS
Write protect area
CC
A1
or V
SS
. The A1 and A2 are read as V
1
IL
because the WP pin is
SS
. The device read
Note
SS
,

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