A29L040A-70 AMICC [AMIC Technology], A29L040A-70 Datasheet - Page 6

• Manufacturer Part Number: A29L040A-70
• Description: 512K X 8 Bit CMOS 3.0 Volt-only, Uniform Sector Flash Memory
• Manufacturer: AMICC [AMIC Technology]

Requirements for Reading Array Data
To read array data from the outputs, the system must drive
the
selects the device.
data to the output pins.
during read operation. The internal state machine is set for
reading array data upon device power-up, or after a
hardware reset. This ensures that no spurious alteration of
the memory content occurs during the power transition. No
command is necessary in this mode to obtain array data.
Standard microprocessor read cycles that assert valid
addresses on the device address inputs produce valid data
on the device data outputs. The device remains enabled for
read access until the command register contents are altered.
See "Reading Array Data" for more information. Refer to the
AC Read Operations table for timing specifications and to the
Read Operations Timings diagram for the timing waveforms,
l
current specification for reading array data.
Writing Commands/Command Sequences
To write a command or command sequence (which includes
programming data to the device and erasing sectors of
memory), the system must drive
multiple sectors, or the entire device. The Sector Address
Tables indicate the address range that each sector occupies.
A "sector address" consists of the address inputs required to
uniquely select a sector. See the "Command Definitions"
section for details on erasing a sector or the entire chip, or
suspending/resuming the erase operation.
After the system writes the autoselect command sequence,
the device enters the autoselect mode. The system can then
read autoselect codes from the internal register (which is
separate from the memory array) on I/O
read cycle timings apply in this mode. Refer to the
Note: All sectors are 64 Kbytes in size.
PRELIMINARY (March, 2005, Version 0.0)
OE
CC1
CE
in the DC Characteristics table represents the active
to V
Sector
and
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
IH
. An erase operation can erase one sector,
OE
pins to V
OE
WE
is the output control and gates array
IL
.
should remain at V
A18
CE
0
0
0
0
1
1
1
1
is the power control and
WE
and
7
- I/O
Table 2. Sector Addresses Table
CE
IH
0
to V
all the time
. Standard
A17
0
0
0
0
1
1
1
1
IL
, and
5
"Autoselect Mode" and "Autoselect Command Sequence"
sections for more information.
I
specification for the write mode. The "AC Characteristics"
section contains timing specification tables and timing
diagrams for write operations.
Program and Erase Operation Status
During an erase or program operation, the system may
check the status of the operation by reading the status bits
on I/O
specifications apply. Refer to "Write Operation Status" for
more information, and to each AC Characteristics section for
timing diagrams.
Standby Mode
When the system is not reading or writing to the device, it
can place the device in the standby mode. In this mode,
current consumption is greatly reduced, and the outputs are
placed in the high impedance state, independent of the
input.
The device enters the CMOS standby mode when the
pin is held at V
voltage range than V
mode when
standard access time (t
If the device is deselected during erasure or programming,
the device draws active current until the operation is
completed.
I
current specification.
Output Disable Mode
When the
disabled. The output pins are placed in the high impedance
state.
CC2
CC3
A16
in the Characteristics table represents the active current
in the DC Characteristics tables represents the standby
0
0
1
0
1
0
1
1
7
- I/O
OE
CE
0
. Standard read cycle timings and I
CC
input is at V
± 0.3V. (Note that this is a more restricted
is held at V
IH
.) The device enters the TTL standby
CE
) before it is ready to read data.
AMIC Technology, Corp.
Address Range
00000h - 0FFFFh
20000h - 2FFFFh
30000h - 3FFFFh
40000h - 4FFFFh
50000h - 5FFFFh
60000h - 6FFFFh
70000h - 7FFFFh
10000h - 1FFFFh
IH
IH
, output from the device is
A29L040A Series
. The device requires the
CC
read
OE
CE