HN58X24128FPIAG RENESAS [Renesas Technology Corp], HN58X24128FPIAG Datasheet - Page 13

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HN58X24128FPIAG

Manufacturer Part Number
HN58X24128FPIAG
Description
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Device Addressing
The EEPROM device requires an 8-bit device address word following a start condition to enable the chip
for a read or a write operation. The device address word consists of 4-bit device code, 3-bit device address
code and 1-bit read/write(R/W) code. The most significant 4-bit of the device address word are used to
distinguish device type and this EEPROM uses “1010” fixed code. The device address word is followed by
the 3-bit device address code in the order of A2, A1, A0. The device address code selects one device out of
all devices which are connected to the bus. This means that the device is selected if the inputted 3-bit
device address code is equal to the corresponding hard-wired A2-A0 pin status. The eighth bit of the
device address word is the read/write(R/W) bit. A write operation is initiated if this bit is low and a read
operation is initiated if this bit is high. Upon a compare of the device address word, the EEPROM enters
the read or write operation after outputting the zero as an acknowledge. The EEPROM turns to a stand-by
state if the device code is not “1010” or device address code doesn’t coincide with status of the correspond
hard-wired device address pins A0 to A2.
Device Address Word
128k, 256k
Note:
1. R/W=“1” is read and R/W = “0” is write.
Device address word (8-bit)
Device code (fixed)
1
0
1
HN58X24128FPIAG/HN58X24256FPIAG
0
Device address code
A2
A1
A0
R/W code*
R/W
11
1

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