AIC1341 Analog Intergrations Corporation, AIC1341 Datasheet - Page 9

• Manufacturer Part Number: AIC1341
• Description: High Performance/ Triple-Output/ Auto-Tracking Combo Controller
• Manufacturer: Analog Intergrations Corporation

Shutdown
Compatible with the TTL logic level, by holding the
SD (pin3) pin low will activate the controller. If
connecting a resistor to ground, make sure the
resistor is less than 4.7K
Layout Considerations
Any inductance in the switched current path gen-
erates a large voltage spike during the switching
interval. The voltage spikes can degrade efficiency,
radiate noise into the circuit, and lead to device
over-voltage stress. Careful component selection
and tight layout of critical components, and short,
wide metal trace minimize the voltage spike.
1) A ground plane should be used. Locate the
2) The connection between Q1, Q2 and output
3) The output capacitor (C
4) The AIC1341 is best placed over a quiet
input capacitors (C
switches. Minimize the loop formed by C
the upper MOSFET (Q1) and the lower
MOSFET (Q2) as possible. Connections
should be as wide as short as possible to
minimize loop inductance.
inductor should be as wide as short as practi-
cal. Since this connection has fast voltage
transitions will easily induce EMI.
ed as close the load as possible. Because
minimize the transient load magnitude for high
slew rate requires low inductance and resis-
tance in circuit board
ground plane area. The GND pin should be
connected to the groundside of the output ca-
pacitors. Under no circumstances should
GND be returned to a ground inside the C
IN
) close to the power
for normal operation.
OUT
) should be locat-
IN
IN
,
,
A multi-layer printed circuit board is recom-
mended. Figure 6 shows the connections of the
critical components in the converter. The C
C
pacitors. Dedicate one solid layer for a ground
plane and make all critical component ground
connections with vias to this layer.
PWM Output Capacitors
The load transient for the microprocessor core re-
quires high quality capacitors to supply the high
slew rate (di/dt) current demand.
The ESR (equivalent series resistance) and ESL
(equivalent series inductance) parameters rather
than actual capacitance determine the buck c a-
pacitor values. For a given transient load magni-
tude, the output voltage transient change due to
the output capacitor can be note by the following
equation:
5) The wiring traces from the control IC to the
6) The Vcc pin should be decoupled directly to
OUT
V
I
OUT
OUT
Q1, Q2 loop. The GND and PGND pins
should be shorted right at the IC. This help to
minimize internal ground disturbances in the
IC and prevents differences in ground potential
from disrupting internal circuit operation.
MOSFET gate and source should be sized to
carry 1A current. Locate C
AIC1341 IC.
GND by a 1 F ceramic capacitor, trace
lengths should be as short as possible.
could each represent numerous physical ca-
is transient load current step.
ESR
I
OUT
ESL
OUT2
AIC1341
I
OUT
T
close to the
,
IN
where
9
and