HD6433044 Hitachi Semiconductor, HD6433044 Datasheet - Page 514
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HD6433044
Manufacturer Part Number
HD6433044
Description
(HD64 Series) Hitachi Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet
1.HD6433044.pdf
(867 pages)
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14.2.4 Serial Control Register (SCR)
Bits 1 and 0 have different functions in smart card interface mode. However, this function does not
exist in the flash memory version.
Bits 7 to 2—Operate in the same way as for the normal SCI.
For details, see section 13.2.6, Serial Control Register (SCR).
Bits 1 and 0—Clock Enable (CKE1, CKE0): Setting enable or disable for the SCI clock
selection and clock output from the SCK pin. In smart card interface mode, it is possible to switch
between enabling and disabling of the normal clock output, and specify a fixed high level or fixed
low level for the clock output.
SMR
Bit 7
GM
0
0
1
1
1
1
Bit
Initial value
Read/Write
Bit 1
CKE1
0
0
0
0
1
1
SCR
R/W
Bit 0
CKE0
0
1
0
1
0
1
TIE
7
0
Description
The internal clock/SCK0 pin functions as an I/O port
The internal clock/SCK0 pin functions as the clock output
The internal clock/SCK0 pin is fixed at low-level output
The internal clock/SCK0 pin functions as the clock output
The internal clock/SCK0 pin is fixed at high-level output
The internal clock/SCK0 pin functions as the clock output
R/W
RIE
6
0
R/W
TE
5
0
R/W
504
RE
0
4
R/W
MPIE
3
0
TEIE
R/W
2
0
CKE1
R/W
1
0
(Initial value)
CKE0
R/W
0
0
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