EL1881C Elantec, EL1881C Datasheet
EL1881C
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EL1881C Summary of contents
Page 1
... The EL1881C is plug-in compatible with the industry-standard LM1881 and can be substituted for that part in 5V applications with lower required supply current. The EL1881C is available in the 8-pin PDIP and SO packages and is specified for operation over the full -40°C to +85°C temperature range. ...
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... EL1881C Sync Separator, Low Power Absolute Maximum Ratings V Supply CC Storage Temperature Pin Voltages Important Note: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: T ...
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... An external resistor to ground sets all internal timing; a 681k 1% resistor will provide correct timing for NTSC signals SET 7 Odd/Even Odd/even field output; high during odd fields, low during even fields; transitions occur at start of vert sync pulse Output Positive supply (5V must resistor SET EL1881C Sync Separator, Low Power Pin Function 3 ...
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... EL1881C Sync Separator, Low Power Typical Performance Curves Supply Current vs Temperature R =681k SET 1.65 5.5V 1.6 5V 1.55 4.5V 1.5 1.45 1.4 1.35 -50 - Temperature (°C) Clamp Discharge Current vs Temperature R =681k SET 11.4 11.3 5.5V 11.2 5V 11.1 4.5V 11 10.9 10.8 10.7 -50 - Temperature (°C) Clamp Charge Current vs Temperature R =681k SET 1.1 1.05 5. 4.5V 0.95 0.9 0.85 -50 - Temperature (°C) V Voltage vs Temperature ...
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... 120 100 800 1000 200 Burst/Back Porch Width vs Temperature 3.9 3.8 3.7 3.6 3.5 3.4 3.3 3.2 3.1 75 100 -50 -25 5 EL1881C Sync Separator, Low Power SET =25°C 400 600 800 1000 SET SET =25°C 400 600 800 1000 SET 5. 100 Temperature (°C) ...
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... EL1881C Sync Separator, Low Power Typical Performance Curves Burst/Back Porch Delay vs Temperature R =681k SET 250 5.5V 200 5V 150 4.5V 100 50 0 -50 - Temperature (°C) Vertical Sync Default Delay Time vs Temperature R =681k SET 64.5 63.5 5.5V 62.5 5V 61.5 4.5V 60.5 59.5 -50 - Temperature (°C) Composite Sync to Odd/Even Delay Time ...
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... Back porch goes low for a fixed pulse width on the trailing edge of video input sync pulses. Note that for serration pulses during vertical, the back porch starts on the rising edge of the serration pulse (with propagation delay). * Signal 1a drawing reproduced with permission from EIA. Figure 1. Standard (NTSC Input) Timing EL1881C Sync Separator, Low Power 7 ...
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... EL1881C Sync Separator, Low Power Expanded Timing Diagrams Figure 2. Standard Vertical Timing Figure 3. Non-Standard Vertical Timing 8 ...
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... Figure 4. Standard (NTSC Input) H. Sync Detail 9 EL1881C Sync Separator, Low Power ...
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... The vertical cycle starts with a pre-equalizing phase of pulses with a duty cycle of about 93%, followed by a vertical serration phase that has a duty cycle of about 15%. Vertical Sync is clocked out of the EL1881C on the first rising edge during the vertical serration phase. In the absence of vertical serration pulses, a vertical sync pulse will be forced out after the vertical sync default delay time, approximately 60µ ...
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... Simplified Block Diagram * Note: R must resistor. SET Sync Separator, Low Power 15kHz sync signals without appreciable attenuation. A chroma filter will increase the propagation delay from the composite input to the outputs. Figure 5. Figure 6. 11 EL1881C ...
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... EL1881C Sync Separator, Low Power General Disclaimer Specifications contained in this data sheet are in effect as of the publication date shown. Elantec, Inc. reserves the right to make changes in the cir- cuitry or specifications contained herein at any time without notice. Elantec, Inc. assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement ...