LP2975AIMM-12 National Semiconductor, LP2975AIMM-12 Datasheet - Page 11

• Manufacturer Part Number: LP2975AIMM-12
• Description: MOSFET LDO Driver/Controller
• Manufacturer: National Semiconductor

Application Hints
FET in low power designs. Because of the increased cell
density (and tiny packages) used by modern FET’s, the cur-
rent carrying capability may easily exceed the power dissipa-
tion limits of the package. It is possible to parallel two or
more FET’s, which divides the power dissipation among all
of the packages.
It should be noted that the “heatsink” for a surface mount
package is the copper of the PC board and the package itself
(direct radiation).
Surface-mount devices have the value of
typical PC board mounting on their data sheet. In most cases
it is best to start with the known data for the application (P
T
value will define the type of FET and, possibly, the heatsink
required for cooling.
DESIGN EXAMPLE: A design is to be done with V
and V
Based on these conditions, power dissipation in the FET dur-
ing normal operation would be:
Solving, we find that P
mum allowable value of T
70˚C, the value of
However, if this design must survive a continuous short on
the output, the power dissipated in the FET is higher:
(This assumes the current sense resistor is selected for an
I
The value of
is calculated to be 49˚C/W.
Having solved for the value(s) of
lected. It should be noted that a FET must be used with a
HIGH POWER ( 2W) APPLICATIONS: As power dissipa-
tion increases above 2W, a FET in a larger package must be
used to obtain lower values of
rived in the previous section are used to calculate P
Having found
value of
that a heatsink can be selected:
Where:
rameter is the measure of thermal resistance between the
semiconductor die inside the FET and the surface of the
case of the FET where it mounts to the heatsink (the value of
FET in a TO-220 package will have a
mately 2–4˚C/W, while a device in a TO-3 package will be
about 0.5–2˚C/W.
measures how much thermal resistance exists between the
surface of the FET and the heatsink.
the package type and mounting method. A TO-220 package
with mica insulator and thermal grease secured to a heatsink
will have a
package mounted in the same manner will have a
SC
J-A
J-A
J-C
J-C
C-S
A
, T
value that is 10% higher than the required 0.3A).
.
value less than or equal to the calculated value.
can be found on the data sheet for the FET). A typical
is the junction-to-case thermal resistance. This pa-
J
is the case-to-heatsink thermal resistance, which
) and calculate the required value of
OUT
S-A
P
= 3.3V with a maximum load current of 300 mA.
D
(SC) = V
(the heatsink-to-ambient thermal resistance) so
C-S
J-A
J-A
P
value in the range of 1–1.5˚C/W. A TO-3
required to survive continuous short circuit
S-A
D
J-A
, it becomes necessary to calculate the
J-A
= (V
= (T
=
IN
D
is found to be 157˚C/W.
x I
IN
J-A
= 0.51W. Assuming that the maxi-
J
J
SC
− V
is 150˚C and the maximum T
− T
− (
= 5 x 0.33 = 1.65W
(Continued)
OUT
A
)/P
J-A
J-C
) x I
D
. The same formulae de-
+
(MAX)
J-A
LOAD
C-S
, a FET can be se-
J-C
C-S
)
J-A
value of approxi-
is dependent on
J-A
specified for a
needed. This
C-S
IN
D
value
= 5V
and
A
D
is
,
11
of 0.3–0.5˚C/W. The best source of information for this is
heatsink catalogs (Wakefield, AAVID, Thermalloy) since they
also sell mounting hardware.
defines how well a heatsink transfers heat into the air. Once
this is determined, a heatsink must be selected which has a
value which is less than or equal to the computed value. The
value of
sheet for a heatsink, but the information is sometimes given
in a graph of temperature rise vs. dissipated power.
DESIGN EXAMPLE: A design is to be done which takes
3.3V in and provides 2.5V out at a load current of 7A. The
power dissipation will be calculated for both normal opera-
tion and short circuit conditions.
For normal operation:
If the output is shorted to ground:
(Assuming that a sense resistor is selected to set the value
of I
a maximum T
For normal operation:
For designs which must operate with the output shorted to
ground:
The value of 14.3˚C/W can be easily met using a TO-220 de-
vice. Calculating the value of
value of
Any heatsink may be used with a thermal resistance
10.3˚C/W
data sheet curves). Examples of suitable heatsinks are Ther-
malloy #6100B and IERC #LATO127B5CB.
However, if the design must survive a sustained short on the
output, the calculated
possibility of using a TO-220 package device.
Assuming a TO-3 device is selected with a
1.5˚C/W and
value of
A
sink, or possibly some kind of forced airflow for cooling.
SHORT-CIRCUIT CURRENT LIMITING
Short-circuit current limiting is easiliy implemented using a
single external resistor (R
culated from:
Where:
I
V
The value of V
listed in the Electrical Characteristics section. When doing a
worst-case calculation for power dissipation in the FET, it is
important to consider both the tolerance of V
ance (and temperature drift) of R
SC
S-A
J-A
CL
SC
S-A
is the desired short circuit current.
will be calculated assuming a maximum T
is the current limit sense voltage.
is the heatsink-to-ambient thermal resistance, which
10% above the nominal 7A).
value 1.3˚C/W would require a relatively large heat-
P
J-C
S-A
@
S-A
D
5.6W power dissipation (refer to manufacturer’s
P
(SC) = V
:
= 3˚C/W and
J-A
J-A
J
S-A
D
S-A
C-S
is usually listed in the manufacturer’s data
CL
of 150˚C:
= (V
= (150 − 70) / 5.6 = 14.3˚C/W
= (150 − 70) / 25.4 = 3.2˚C/W
= 3.2 − (1.5 + 0.4) = 1.3˚C/W
S-A
S-A
= 14.3 − (3 + 1) = 10.3˚C/W
is 57 mV (typical), with guaranteed limits
J-A
= 0.4˚C/W, we can calculate the required
IN
IN
= (T
=
=
R
− V
SC
J-A
x I
J-A
J-A
J
SC
OUT
SC
= V
value of 3.2˚C/W eliminates the
− T
C-S
). The value of R
− (
− (
= 3.3 x 7.7 = 25.4W
) x I
CL
A
)/P
= 1˚C/W):
J-C
J-C
SC
S-A
/ I
LOAD
D
SC
.
+
+
(MAX)
required (assuming a
C-S
C-S
= 5.6W
)
)
CL
SC
A
and the toler-
J-C
of 70˚C and
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can be cal-
value of