24AA32A MicrochipTechnology, 24AA32A Datasheet - Page 7

• Manufacturer Part Number: 24AA32A
• Description: 32K1.8VI2COSerialEEPROM
• Manufacturer: MicrochipTechnology

5.0
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the stop condition for a write com-
mand has been issued from the master, the device ini-
tiates the internally timed write cycle. Acknowledge
Polling (ACK) can be initiated immediately. This
involves the master sending a start condition followed
by the control byte for a write command (R/W = 0). If the
device is still busy with the write cycle, then no ACK will
be returned. If the cycle is complete, then the device will
return the ACK and the master can then proceed with
the next read or write command. See Figure 5-1 for flow
diagram.
FIGURE 5-1:
FIGURE 6-1:
1996 Microchip Technology Inc.
ACKNOWLEDGE POLLING
Initiate Write Cycle
Send Control Byte
Write Command
with R/W = 0
Condition to
Acknowledge
Send Stop
Send Start
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
Did Device
Operation
ACKNOWLEDGE POLLING
FLOW
(ACK = 0)?
CURRENT ADDRESS READ
Send
Next
YES
NO
S
T
A
R
T
S
CONTROL BYTE
Preliminary
6.0
Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
slave address is set to one. There are three basic types
of read operations: current address read, random read,
and sequential read.
6.1
The 24AA32A contains an address counter that main-
tains the address of the last word accessed, internally
incremented by one. Therefore, if the previous access
(either a read or write operation) was to address n (n is
any legal address), the next current address read oper-
ation would access data from address n + 1. Upon
receipt of the slave address with R/W bit set to one, the
24AA32A issues an acknowledge and transmits the
eight bit data word. The master will not acknowledge
the transfer but does generate a stop condition and the
24AA32A discontinues transmission (Figure 6-1).
6.2
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set. This is done by sending the word address to the
24AA32A as part of a write operation (R/W bit set to
zero). After the word address is sent, the master gener-
ates a start condition following the acknowledge. This
terminates the write operation, but not before the inter-
nal address pointer is set. Then the master issues the
control byte again but with the R/W bit set to a one. The
24AA32A will then issue an acknowledge and transmit
the 8-bit data word. The master will not acknowledge
the transfer but does generate a stop condition which
causes the 24AA32A to discontinue transmission
(Figure 6-2).
A
C
K
READ OPERATION
Current Address Read
Random Read
DATA BYTE
24AA32A
O
N
A
C
K
S
T
O
P
P
DS21162B-page 7