AT49F020-55JC ATMEL Corporation, AT49F020-55JC Datasheet - Page 3

• Manufacturer Part Number: AT49F020-55JC
• Description: 2-Megabit 256K x 8 5-volt Only CMOS Flash Memory
• Manufacturer: ATMEL Corporation

PRODUCT IDENTIFICATION: The product identification
mode identifies the device and manufacturer as Atmel. It
may be accessed by hardware or software operation. The
hardware operation mode can be used by an external pro-
grammer to identify the correct programming algorithm for
the Atmel product.
For details, see Operating Modes (for hardware operation)
or Software Product Identification. The manufacturer and
device code is the same for both modes.
DATA POLLING: The AT49F020 features DATA polling to
indicate the end of a program cycle. During a program
cycle an attempted read of the last byte loaded will result in
the complement of the loaded data on I/O7. Once the pro-
gram cycle has been completed, true data is valid on all
outputs and the next cycle may begin. DATA polling may
begin at any time during the program cycle.
Command Definition (in Hex)
Notes:
Absolute Maximum Ratings*
Read
Chip Erase
Byte Program
Boot Block
Lockout
Product ID
Entry
Product ID Exit
(2)
Product ID Exit
(2)
Temperature Under Bias................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
All Input Voltages (including NC Pins)
with Respect to Ground ...................................-0.6V to +6.25V
All Output Voltages
with Respect to Ground .............................-0.6V to V
Voltage on OE
with Respect to Ground ...................................-0.6V to +13.5V
Command
Sequence
1.
2.
(1)
The 8K byte boot sector has the address range 00000H to 01FFFH.
Either one of the Product ID exit commands can be used.
Cycles
Bus
1
6
6
3
3
1
4
XXXX
Addr
5555
5555
5555
5555
5555
Addr
1st Bus
Cycle
D
Data
AA
AA
AA
AA
AA
F0
OUT
2AAA
2AAA
2AAA
2AAA
2AAA
Addr
2nd Bus
Cycle
CC
+ 0.6V
Data
55
55
55
55
55
Addr
5555
5555
5555
5555
5555
TOGGLE BIT: In addition to DATA polling the AT49F020
provides another method for determining the end of a pro-
gram or erase cycle. During a program or erase operation,
successive attempts to read data from the device will result
in I/O6 toggling between one and zero. Once the program
cycle has completed, I/O6 will stop toggling and valid data
will be read. Examining the toggle bit may begin at any time
during a program cycle.
HARDWARE DATA PROTECTION: Hardware features
protect against inadvertent programs to the AT49F020 in
the following ways: (a) V
ical), the program function is inhibited. (b) Program inhibit:
holding any one of OE low, CE high or WE high inhibits pro-
gram cycles. (c) Noise filter: pulses of less than 15 ns (typi-
cal) on the WE or CE inputs will not initiate a program
cycle.
3rd Bus
Cycle
*NOTICE:
Data
A0
F0
80
80
90
Addr
5555
5555
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Addr
4th Bus
Cycle
Data
AA
D
AA
IN
CC
sense: if V
2AAA
2AAA
Addr
5th Bus
Cycle
Data
CC
55
55
is below 3.8V (typ-
Addr
5555
5555
6th Bus
Cycle
Data
10
40
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