M48Z02 ST Microelectronics, M48Z02 Datasheet - Page 2

• Manufacturer Part Number: M48Z02
• Description: 16 Kbit 2Kb x 8 ZEROPOWER SRAM
• Manufacturer: ST Microelectronics

M48Z02, M48Z12
Table 2. Absolute Maximum Ratings
Notes: 1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a
Table 3. Operating Modes
Notes: X = V
Figure 2. DIP Pin Connections
2/12
Deselect
Write
Read
Read
Deselect
Deselect
Mode
Symbol
T
2. Soldering temperature not to exceed 260 C for 10 seconds (total thermal budget not to exceed 150 C for longer than 30 seconds).
CAUTION: Negative undershoots below –0.3 volts are not allowed on any pin while in the Battery Back-up mode.
T
SLD
V
V
P
T
STG
I
stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to the absolute maximum rating conditions for extended periods of time may
affect reliability.
CC
O
IO
A
D
(2)
IH
DQ0
DQ1
DQ2
V SS
or V
A7
A6
A5
A4
A3
A2
A1
A0
V
IL
SO
4.75V to 5.5V
; V
4.5V to 5.5V
1
2
3
4
5
6
7
8
9
10
11
12
to V
SO
Ambient Operating Temperature
Storage Temperature (V
Lead Solder Temperature for 10 seconds
Input or Output Voltages
Supply Voltage
Output Current
Power Dissipation
V
= Battery Back-up Switchover Voltage.
or
V
CC
PFD
M48Z02
M48Z12
SO
(min)
AI01187
24
23
22
21
20
19
18
17
16
15
14
13
V CC
A8
A9
W
G
A10
E
DQ7
DQ6
DQ5
DQ4
DQ3
Parameter
V
V
V
V
X
E
X
IH
IL
IL
IL
CC
(1)
Off)
V
V
G
X
X
X
X
IL
IH
DESCRIPTION (cont’d)
The M48Z02/12 is a non-volatile pin and function
equivalent to any JEDEC standard 2K x 8 SRAM.
It also easily fits into many ROM, EPROM, and
EEPROM sockets, providing the non-volatility of
PROMs without any requirement for special write
timing or limitations on the number of writes that
can be performed.
The M48Z02/12 also has its own Power-fail Detect
circuit. The control circuitry constantly monitors the
single 5V supply for an out of tolerance condition.
When V
protects the SRAM, providing a high degree of data
security in the midst of unpredictable system op-
eration brought on by low V
approximately 3V, the control circuitry connects the
battery which maintains data and clock operation
until valid power returns.
V
V
V
W
X
X
X
CC
IH
IH
IL
is out of tolerance, the circuit write
–40 to 85
–40 to 85
DQ0-DQ7
–0.3 to 7
–0.3 to 7
High Z
High Z
High Z
High Z
D
D
Value
OUT
IN
260
20
1
CC
Battery Back-up Mode
. As V
CMOS Standby
Standby
Power
Active
Active
Active
CC
falls below
Unit
mA
W
V
V
C
C
C