LH28F004SU-LC Sharp Electrionic Components, LH28F004SU-LC Datasheet - Page 4

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LH28F004SU-LC

Manufacturer Part Number
LH28F004SU-LC
Description
4M (512K bb 8) Flash Memory
Manufacturer
Sharp Electrionic Components
Datasheet
LH28F004SU-LC
INTRODUCTION
revolutionary architecture which enables the design of
truly mobile, high performance, personal computing and
communication products. With innovative capabilities.
3.3 V low power operation and very high read/write per-
formance, the LH28F004SU-LC is also the ideal choice
for designing embedded mass storage flash memory
systems.
symmectrical blocked architecture (16K each) extended
cycling, low power operation, very fast write and read
performance and selective block locking provide a highly
flexible memory component suitable for cellular phone,
facsmilie, game, PC, printer and handy terminal. The
LH28F004SU-LC's 5.0 V/3.3 V power supply operation
enables the design of memory cards which can be read
in 3.3 V system and written in 5.0 V/3.3 V systems. Its
x8 architecture allows the optimization of memory to
processor interface. The flexible block locking option
enables bundling of executable application software in
a Resident Flash Array or memory card. Manufactured
on Sharp’s 0.55 µm ETOX™ process technology, the
LH28F004SU-LC is the most cost-effective, high-
density 3.3 V flash memory.
DESCRIPTION
(4,194,304 bit) block erasable non-volatile random
access memor y organized as 512K × 8. The
LH28F004SU-LC includes thirty-two 16K (16,384)
blocks. A chip memory map is shown in Figure 3.
enhanced features, will improve the device operating
characteristics and results in greater product reliability
and ease of use.
LH28F004SU-LC:
1.2 mm thick × 10 mm × 20 mm TSOP (Type I) pack-
age. This form factor and pinout allow for very high board
layout densities.
4
Sharp’s LH28F004SU-LC 4M Flash Memory is a
The LH28F004SU-LC’s independently lockable 32
The LH28F004SU-LC is a high performance 4M
The implementation of a new architecture, with many
Among the significant enhancements of the
3 V Read, 5 V Write/Erase Operation
(5 V V
Low Power Capability (2.7 V V
Improved Write Performance
Dedicated Block Write/Erase Protection
Command-Controlled Memory Protection
Set/Reset Capability
The LH28F004SU-LC will be available in a 40-pin,
PP
, 3 V V
CC
)
CC
Read)
system Interface between the microprocessor or
microcontroller and the internal memory operation.
Block Erase operations to be executed using a Two-
Write command sequence to the CUI in the same way
as the LH28F008SA 8M Flash memory.
basic LH28F008SA command-set to achieve higher
write performance and provide additional capabilities.
These new commands and features include:
20 µs. A Block Erase operation erases one of the 32
blocks in typically 0.8 seconds, independent of the other
blocks.
It is desirable in case you have to implement Erase
operation maximum 32 times.
which is operated by three times command input. Writ-
ing of memory data is performed typically within 30 µs
per two-byte. This feature can improve system write per-
formance by up to typically 15 µs per byte.
commands to the device. Status Register (described in
detail later) and a RY
tion on the progress of the requested operation.
requires an operation to complete before the next
operation can be requested, also it allows to suspend
block erase to read data from any other block, and
allow to resume erase operation.
locking to protect code or data such as Device Drivers,
PCMCIA card information, ROM-Executable OS or
Application Code. Each block has an associated non-
volatile lock-bit which determines the lock status of the
block. In addition, the LH28F004SU-LC has a software
controlled master Write Protect circuit which prevents
any modifications to memory blocks whose lock-bits
are set.
A Command User Interface (CUI) serves as the
Internal Algorithm Automation allows Byte Writes and
A Superset of commands have been added to the
Software Locking of Memory Blocks
Memory Protection Set/Reset Capability
Two-Byte Serial Writes in 8-bit Systems
Erase All Unlocked Blocks
Writing of memory data is performed typically within
LH28F004SU-LC allows to erase all unlocked blocks.
LH28F004SU-LC enables Two-Byte serial Write
All operations are started by a sequence of Write
Same as the LH28F008SA, LH28F004SU-LC
The LH28F004SU-LC provides user-selectable block
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4M (512K × 8) Flash Memory
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output pin provide informa-

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