M27C256B-12N1TR STMicroelectronics, M27C256B-12N1TR Datasheet - Page 8

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M27C256B-12N1TR

Manufacturer Part Number
M27C256B-12N1TR
Description
256 Kbit (32Kb x 8) UV EPROM and OTP EPROM
Manufacturer
STMicroelectronics
Datasheet
M27C256B
Figure 6. Programming and Verify Modes AC Waveforms
Figure 7. Programming Flowchart
8/15
YES
NO
FAIL
= 25
++n
V CC
A0-A14
Q0-Q7
V PP
E
G
V CC = 6.25V, V PP = 12.75V
CHECK ALL BYTES
NO
2nd: V CC = 4.2V
E = 100 s Pulse
1st: V CC = 6V
VERIFY
n = 0
Addr
Last
YES
YES
tVCHEL
tVPHEL
NO
tQVEL
tAVEL
tELEH
DATA IN
++ Addr
PROGRAM
AI00760B
VALID
tEHQX
PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows to pro-
gram the whole array with a guaranteedmargin, in
a typical time of 3.5 seconds. Programming with
PRESTO II involves the application of a sequence
of 100 s programpulses to each byte untila correct
verify occurs (see Figure 7). During programming
and verify operation, a MARGIN MODE circuit is
automatically activated in order to guarantee that
each cell is programmed with enough margin. No
overprogram pulse is applied since the verify in
MARGIN MODE provides necessary margin to
each programmed cell.
Program Inhibit
Programming of multiple M27C256Bs in parallel
with different data is also easily accomplished.
Except for E, all like inputs including G of the
parallel M27C256B may be common. A TTL low
level pulse applied to a M27C256B’s E input, with
V
high level E input inhibits the other M27C256Bs
from being programmed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correctly
programmed. The verify is accomplished with G at
V
PP
IL
tQXGL
, E at V
at 12.75 V, will program that M27C256B. A
VERIFY
tGLQV
DATA OUT
IH
, V
PP
at 12.75V and V
tGHQZ
tGHAX
AI00759
CC
at 6.25V.

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