X28HC64 Xicor, X28HC64 Datasheet

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X28HC64

Manufacturer Part Number
X28HC64
Description
5 Volt/ Byte Alterable E2PROM
Manufacturer
Xicor
Datasheet

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64K
© Xicor, Inc. 1994, 1995, 1996 Patents Pending
3857-3.0 8/5/97 T1/C0/D0 EW
X28HC64
FEATURES
PIN CONFIGURATIONS
V SS
I/O 0
I/O 1
I/O 2
A 12
NC
A 7
A 6
A 5
A 4
A 3
A 2
A 1
A 0
55ns Access Time
Simple Byte and Page Write
—Single 5V Supply
—Self-Timed
Low Power CMOS
—40 mA Active Current Max.
—200 A Standby Current Max.
Fast Write Cycle Times
—64 Byte Page Write Operation
—Byte or Page Write Cycle: 2ms Typical
—Complete Memory Rewrite: 0.25 sec. Typical
—Effective Byte Write Cycle Time: 32 s Typical
Software Data Protection
End of Write Detection
—DATA Polling
—Toggle Bit
—No External High Voltages or V
—No Erase Before Write
—No Complex Programming Algorithms
—No Overerase Problem
Circuits
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PLASTIC DIP
FLAT PACK
X28HC64
CERDIP
SOIC
3857 FHD F02.1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V CC
WE
NC
A 8
A 9
A 11
OE
A 10
CE
I/O 7
I/O 6
I/O 5
I/0 4
I/O 3
I/O 0
NC
A 6
A 5
A 4
A 3
A 2
A 1
A 0
5 Volt, Byte Alterable E
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19 20
4
3
PP
X28HC64
2
PLCC
LCC
Control
1 32 31 30
X28HC64
29
28
27
26
25
24
23
22
21
3857 FHD F03
A 8
A 9
A 11
NC
OE
A 10
CE
I/O 7
I/O 6
1
DESCRIPTION
The X28HC64 is an 8K x 8 E
Xicor’s proprietary, high performance, floating gate
CMOS technology. Like all Xicor programmable non-
volatile memories the X28HC64 is a 5V only device. The
X28HC64 features the JEDEC approved pinout for byte-
wide memories, compatible with industry standard RAMs.
The X28HC64 supports a 64-byte page write operation,
effectively providing a 32 s/byte write cycle and en-
abling the entire memory to be typically written in 0.25
seconds. The X28HC64 also features DATA Polling and
Toggle Bit Polling, two methods providing early end of
write detection. In addition, the X28HC64 includes a
user-optional software data protection mode that further
enhances Xicor’s hardware write protect capability.
Xicor E
tions requiring extended endurance. Inherent data re-
tention is greater than 100 years.
High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
JEDEC Approved Byte-Wide Pinout
V SS
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
A 10
NC
NC
CE
A 2
A 1
A 0
2
PROMs are designed and tested for applica-
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
2
PROM
12
11
9
7
5
4
I/O 1
I/O 0
A 1
A 3
A 5
A 6
13
10
8
6
2
3
I/O 2
A 0
A 2
A 4
A 12
A 7
BOTTOM VIEW
X28HC64
TSOP
Characteristics subject to change without notice
X28HC64
PGA
15
14
28
1
I/O 3
V SS
V CC
NC
2
PROM, fabricated with
17
16
20
22
24
27
I/O 5
I/O 4
CE
OE
A 9
WE
18
19
21
23
25
26
I/O 6
I/O 7
A 10
A 11
A 8
NC
8K x 8 Bit
3857 FHD F04
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
3857 ILL F22
A 3
A 4
A 5
A 6
A 7
A 12
NC
NC
V CC
NC
WE
NC
A 8
A 9
A 11
OE

Related parts for X28HC64

X28HC64 Summary of contents

Page 1

... The X28HC64 Xicor’s proprietary, high performance, floating gate CMOS technology. Like all Xicor programmable non- volatile memories the X28HC64 only device. The X28HC64 features the JEDEC approved pinout for byte- wide memories, compatible with industry standard RAMs. ...

Page 2

... The Output Enable input controls the data output buffers and is used to initiate read operations. Data In/Data Out (I/O –I Data is written to or read from the X28HC64 through the I/O pins. Write Enable (WE) The Write Enable input controls the writing of data to the X28HC64. FUNCTIONAL DIAGRAM A 0 –A 12 ...

Page 3

... The X28HC64 features DATA Polling as a method to indicate to the host system that the byte write or page write cycle has completed. DATA Polling allows a simple bit test operation to determine the status of the X28HC64, eliminating additional interrupt inputs or external hard- ware. During the internal programming cycle, any at- ...

Page 4

... READY HIGH DATA Polling can effectively reduce the time for writing to the X28HC64. The timing diagram in Figure 2 illus- trates the sequence of events on the bus. The software flow diagram in Figure 3 illustrates one method of implementing the routine. NO 3857 FHD F13 4 ...

Page 5

... DATA Polling. This can be especially helpful in an array comprised of multiple X28HC64 memories that is frequently updated. Toggle Bit Polling can also provide a method for status checking in multiprocessor applications. The timing diagram in Figure 4 illustrates the sequence of events on the bus ...

Page 6

... SOFTWARE DATA PROTECTION The X28HC64 offers a software controlled data protec- tion feature. The X28HC64 is shipped from Xicor with the software data protection NOT ENABLED; that is, the device will be in the standard operating mode. In this mode data should be protected during power-up/-down operations through the use of external circuits ...

Page 7

... PAGE Regardless of whether the device has previously been protected or not, once the software data protection algorithm is used, the X28HC64 will automatically dis- able further writes unless another command is issued to deactivate it further commands are issued the X28HC64 will be write protected during power-down and after any subsequent power-up ...

Page 8

... E PROM programmer, the following six step algo- rithm will reset the internal protection circuit. After t the X28HC64 will be in standard operating mode. Note: Once initiated, the sequence of write operations should not be interrupted. 3857 ILL F19.2 ...

Page 9

... X28HC64 SYSTEM CONSIDERATIONS Because the X28HC64 is frequently used in large memory arrays provided with a two line control architecture for both read and write operations. Proper usage can provide the lowest possible power dissipation and elimi- nate the possibility of contention where multiple I/O pins share the same bus ...

Page 10

... X28HC64 ABSOLUTE MAXIMUM RATINGS* Temperature under Bias X28HC64 ..................................... – +85 C X28HC64I, X28HC64M ............. – +135 C Storage Temperature ....................... – +150 C Voltage on any Pin with Respect ....................................... D.C. Output Current ............................................. 5mA Lead Temperature (Soldering, 10 seconds) .............................. 300 C RECOMMENDED OPERATING CONDITIONS Temperature Min. Commercial ...

Page 11

... X28HC64 ENDURANCE AND DATA RETENTION Parameter Minimum Endurance Data Retention POWER-UP TIMING Symbol PUR (3) t Power-up to Read Operation (3) t Power-up to Write Operation PUW CAPACITANCE 1MHz Symbol (3) C Input/Output Capacitance I/O IN (3) C Input Capacitance A.C. CONDITIONS OF TEST Input Pulse Levels ...

Page 12

... C to +125 C – +125 C – +125 C Min OLZ t LZ DATA VALID are periodically sampled and not 100% tested. t OHZ 12 X28HC64-90 X28HC64-12 Max. Min. Max. Min. Max. Units 90 120 70 90 120 70 90 120 35 40 ...

Page 13

... X28HC64 WRITE CYCLE LIMITS Symbol Parameter (5) t Write Cycle Time WC t Address Setup Time AS t Address Hold Time AH t Write Setup Time CS t Write Hold Time CH CE Pulse Width HIGH Setup Time t OES OE HIGH Hold Time t OEH WE Pulse Width t WP ...

Page 14

... X28HC64 CE Controlled Write Cycle ADDRESS OES DATA IN DATA OUT Page Write Cycle ( (8) ADDRESS * I/O BYTE 0 *For each successive write within the page write operation –A 12 should be the same or writes to an unknown address could occur. ...

Page 15

... X28HC64 DATA Polling Timing Diagram (9) ADDRESS I/O 7 Toggle Bit Timing Diagram ( OEH OE HIGH Z I I/O 6 beginning and ending state will vary, depending upon actual Note: (9) Polling operations are by definition read cycles and are therefore subject to read cycle timings. ...

Page 16

... X28HC64 PACKAGING INFORMATION 28-LEAD PLASTIC DUAL IN-LINE PACKAGE TYPE P PIN 1 INDEX PIN 1 SEATING PLANE 0.150 (3.81) 0.125 (3.17) 0.110 (2.79) 0.090 (2.29) TYP. 0.010 (0.25) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 1.460 (37.08) 1.400 (35.56) 0.550 (13.97) 0.510 (12.95) 1.300 (33.02) REF. 0.062 (1.57) 0.020 (0.51) 0.050 (1.27) 0.016 (0.41) 0.610 (15.49) 0.590 (14.99 0.085 (2.16) 0.040 (1.02) ...

Page 17

... X28HC64 PACKAGING INFORMATION 28-LEAD HERMETIC DUAL IN-LINE PACKAGE TYPE D PIN 1 SEATING PLANE 0.200 (5.08) 0.125 (3.18) 0.110 (2.79) 0.090 (2.29) TYP. 0.100 (2.54) TYP. 0.010 (0.25) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 1.490 (37.85) 1.435 (36.45) 1.30 (33.02) REF. 0.070 (1.78) 0.030 (0.76) TYP. 0.055 (1.40) TYP. 0.018 (0.46) 0.620 (15.75) 0.590 (14.99) TYP. 0.614 (15.60 0.610 (15.49) ...

Page 18

... X28HC64 PACKAGING INFORMATION 32-LEAD PLASTIC LEADED CHIP CARRIER PACKAGE TYPE J 0.420 (10.67) 0.045 (1.14 0.495 (12.57) 0.485 (12.32) TYP. 0.490 (12.45) 0.453 (11.51) 0.447 (11.35) TYP. 0.450 (11.43) 0.300 (7.62) REF. PIN 1 0.050 (1.27) TYP. 0.021 (0.53) 0.013 (0.33) TYP. 0.017 (0.43) 0.595 (15.11) 0.585 (14.86) TYP. 0.590 (14.99) 0.553 (14.05) 0.547 (13.89) TYP. 0.550 (13.97) 0.400 REF. (10.16) NOTES: 1 ...

Page 19

... X28HC64 PACKAGING INFORMATION 28-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S 0.1040 (2.6416) 0.0940 (2.3876) 0 – 8 NOTES: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. FORMED LEAD SHALL BE PLANAR WITH RESPECT TO ONE ANOTHER WITHIN 0.004 INCHES 3. BACK EJECTOR PIN MARKED “KOREA” 4. CONTROLLING DIMENSION: INCHES (MM) ...

Page 20

... X28HC64 PACKAGING INFORMATION 32-PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE TYPE E PIN 1 0.200 (5.08) BSC 0.028 (0.71) 0.022 (0.56) (32) PLCS. 0.458 (11.63) 0.442 (11.22) 0.458 (11.63) 0.300 (7.62) NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. TOLERANCE: 1% NLT 0.005 (0.127) 0.150 (3.81) BSC 0.020 (0.51 REF. 0.095 (2.41) 0.075 (1.91) 0.022 (0.56) 0.006 (0.15) 0.055 (1.39) 0.045 (1.14) TYP ...

Page 21

... X28HC64 PACKAGING INFORMATION 28-LEAD CERAMIC PIN GRID ARRAY PACKAGE TYPE K TYP. 0.100 ALL LEADS 0.660 (16.76) 0.640 (16.26) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS 0.080 0.080 0.070 0.070 PIN 1 INDEX ...

Page 22

... X28HC64 PACKAGING INFORMATION 0.740 (18.80) MAX. 0.006 (0.15) 0.003 (0.08) TYP. 0.300 2 PLCS. NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 28-LEAD CERAMIC FLAT PACK PIN 1 INDEX 1 0.440 (11.18) MAX. 0.370 (9.40) 0.250 (6.35) 0.180 (4.57) MIN. 0.030 (0.76) MIN. 22 0.019 (0.48) 0.015 (0.38) 28 0.050 (1.27) BSC 0.045 (1.14) MAX. 0.130 (3.30) 0.090 (2.29) 0.045 (1.14) 0.025 (0.66) 3926 FHD F16 ...

Page 23

... X28HC64 PACKAGING INFORMATION SEE NOTE 2 8.02 (0.315) 7.98 (0.314) 1.18 (0.046) 1.02 (0.040) 0.58 (0.023) 0.42 (0.017) SOLDER PADS FOOTPRINT NOTE: 1. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS (INCHES IN PARENTHESES). 32-LEAD THIN SMALL OUTLINE PACKAGE (TSOP) TYPE T SEE NOTE 2 12.50 (0.492) 12.30 (0.484) PIN #1 IDENT. O 0.76 (0.03) 14.15 (0.557) 13.83 (0.544) 14.80 ± 0.05 (0.583 ± 0.002) 0.30 ± ...

Page 24

... X28HC64 ORDERING INFORMATION X28HC64 Device LIMITED WARRANTY Devices sold by Xicor, Inc. are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Xicor, Inc. makes no warranty, express, statutory, implied description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement ...

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