M27V101-100B1TR STMicroelectronics, M27V101-100B1TR Datasheet - Page 2

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M27V101-100B1TR

Manufacturer Part Number
M27V101-100B1TR
Description
1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM
Manufacturer
STMicroelectronics
Datasheet
M27V101
Figure 2A. DIP Pin Connections
Warning : NC = Not Connected.
Figure 2C. TSOP Pin Connections
Warning : NC = Not Connected.
2/15
V CC
V PP
A11
A13
A14
A16
A15
A12
NC
A9
A8
A7
A6
A5
A4
P
V PP
V SS
A16
A15
A12
Q0
Q1
Q2
A7
A6
A5
A4
A3
A2
A1
A0
1
8
9
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
M27V101
M27V101
(Normal)
AI01906
AI01152B
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
32
25
24
17
V CC
P
NC
A14
A13
A8
A9
A11
G
A10
E
Q7
Q6
Q5
Q4
Q3
G
A10
E
Q7
Q6
Q5
Q4
Q3
V SS
Q2
Q1
Q0
A0
A1
A2
A3
Figure 2B. LCC Pin Connections
Warning: NC = Not Connected.
A new pattern can then be written to the device by
following the programming procedure. For appli-
cations where the content is programmed only one
time and erasure is not required, the M27V101 is
offered in both PDIP32, PLCC32 and TSOP32 (8
x 20 mm) packages.
DEVICE OPERATION
The operating modes of the M27V101 are listed in
the Operating Modes table. A single power supply
is required in the read mode. All inputs are TTL
levels except for VPP and 12V on A9 for Electronic
Signature.
Read Mode
The M27V101 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, indepen-
dent of device selection. Assuming that the ad-
dresses are stable, the address access time
(t
(t
of t
E has been low and the addresses have been sta-
ble for at least t
AVQV
ELQV
GLQV
). Data is available at the output after a delay
) is equal to the delay from E to output
Q0
A7
A6
A5
A4
A3
A2
A1
A0
from the falling edge of G, assuming that
9
AVQV
M27V101
-t
GLQV
17
1
32
.
25
AI00661
A14
A13
A8
A9
A11
G
A10
E
Q7

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