W25P240A-6A Winbond, W25P240A-6A Datasheet - Page 4

• Manufacturer Part Number: W25P240A-6A
• Description: 64K X 64 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM
• Manufacturer: Winbond

TRUTH TABLE
Notes:
1. For a detailed definition of read/write, see the Write Table below.
2. An "X" means don't care, "1" means logic high, and "0" means logic low.
3. The OE pin enables the data output but is not synchronous with the clock. All signals of the SRAM are sampled synchronous to
4. On a write cycle that follows a read cycle, OE must be inactive prior to the start of the write cycle to allow write data to set up the
WRITE TABLE
Read
Read
Write byte 1 I/O1 I/O8
Write byte 2 I/O9 I/O16
Write byte 2, byte 1
Unselected
Begin Read
Begin Read
Continue Read
Continue Read
Continue Read
Continue Read
Suspend Read
Suspend Read
Suspend Read
Suspend Read
Begin Write
Begin Write
Begin Write
Continue Write
Continue Write
Suspend Write
Suspend Write
the bus clock except for the OE pin.
SRAM. OE must also disable the output buffer prior to the end of a write cycle to ensure the SRAM data hold
are met.
READ/WRITE FUNCTION
CYCLE
ADDRESS
External
External
External
Current
Current
Current
Current
Current
Current
Current
Current
USED
Next
Next
Next
Next
Next
Next
No
CE
X
X
X
X
X
GW
1
0
0
1
1
1
1
1
0
X
1
X
1
1
1
1
1
1
BWE
ADSP
1
0
0
0
0
X
X
X
X
X
X
0
1
1
1
1
1
1
1
1
X
1
X
BW8
X
1
1
1
1
- 4 -
ADSC
X
0
0
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
BW7
X
1
1
1
1
BW6
ADV
X
1
1
1
1
X
X
X
0
0
0
0
1
1
1
1
1
1
X
0
0
1
1
BW5
X
1
1
1
1
OE
X
X
X
X
X
X
1
0
1
0
1
0
1
0
X
X
X
X
BW4
X
1
1
1
1
DATA
D-Out
D-Out
D-Out
D-Out
BW3
W25P240A
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
X
1
1
1
1
BW2
X
1
1
0
0
timings
WRITE*
Write
Write
Write
Write
Write
Write
Write
Read
Read
Read
Read
Read
Read
Read
Read
Read
X
X
BW1
X
1
0
1
0